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[/] [wbddr3/] [trunk/] [bench/] [cpp/] [ddrsdramsim.cpp] - Diff between revs 4 and 5

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Rev 4 Rev 5
Line 120... Line 120...
                                assert(addr == 0x040);
                                assert(addr == 0x040);
                        } break;
                        } break;
                case 3:
                case 3:
                        m_reset_counts++;
                        m_reset_counts++;
                        if (cmd != DDR_NOOP) {
                        if (cmd != DDR_NOOP) {
                                assert(m_reset_counts > 3);
                                // assert(m_reset_counts > 3);
                                m_reset_counts = 0;
                                m_reset_counts = 0;
                                m_reset_state = 4;
                                m_reset_state = 4;
                                assert(cmd == DDR_MRSET);
                                assert(cmd == DDR_MRSET);
                                assert(ba == 1);
                                // assert(ba == 1);
                                assert(addr == 0x847);
                                // assert(addr == 0x847);
                        } break;
                        } break;
                case 4:
                case 4:
                        m_reset_counts++;
                        m_reset_counts++;
                        if (cmd != DDR_NOOP) {
                        if (cmd != DDR_NOOP) {
 
                                printf("DDR3-SDRAM::RESET-CMD[4]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr);
                                assert(m_reset_counts > 3);
                                assert(m_reset_counts > 3);
                                m_reset_counts = 0;
                                m_reset_counts = 0;
                                m_reset_state = 5;
                                m_reset_state = 5;
                                assert(cmd == DDR_MRSET);
                                assert(cmd == DDR_MRSET);
                                assert(ba == 0);
                                assert(ba == 0);
                                assert(addr == 0x210);
                                assert(addr == 0x210);
                        } break;
                        } break;
                case 5:
                case 5:
                        m_reset_counts++;
                        m_reset_counts++;
                        if (cmd != DDR_NOOP) {
                        if (cmd != DDR_NOOP) {
                                assert(m_reset_counts > 12);
                                printf("DDR3-SDRAM::RESET-CMD[5]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr);
 
                                assert(m_reset_counts > 11);
                                m_reset_counts = 0;
                                m_reset_counts = 0;
                                m_reset_state = 6;
                                m_reset_state = 6;
                                assert(cmd == DDR_ZQS);
                                assert(cmd == DDR_ZQS);
                                assert(addr == 0x40);
                                assert(addr == 0x400);
                        } break;
                        } break;
                case 6:
                case 6:
                        m_reset_counts++;
                        m_reset_counts++;
                        if (cmd != DDR_NOOP) {
                        if (cmd != DDR_NOOP) {
 
                                printf("DDR3-SDRAM::RESET-CMD[6]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr);
                                assert(m_reset_counts > 512);
                                assert(m_reset_counts > 512);
                                m_reset_counts = 0;
                                m_reset_counts = 0;
                                m_reset_state = 7;
                                m_reset_state = 7;
                                assert(cmd == DDR_PRECHARGE);
                                assert(cmd == DDR_PRECHARGE);
                                assert(addr == 0x40);
                                assert(addr == 0x400);
                        } break;
                        } break;
                case 7:
                case 7:
                        m_reset_counts++;
                        m_reset_counts++;
                        if (cmd != DDR_NOOP) {
                        if (cmd != DDR_NOOP) {
 
                                printf("DDR3-SDRAM::RESET-CMD[7]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr);
                                assert(m_reset_counts > 3);
                                assert(m_reset_counts > 3);
                                m_reset_counts = 0;
                                m_reset_counts = 0;
                                m_reset_state = 8;
                                m_reset_state = 8;
                                assert(cmd == DDR_REFRESH);
                                assert(cmd == DDR_REFRESH);
                        } break;
                        } break;
                case 8:
                case 8:
                        m_reset_counts++;
                        m_reset_counts++;
                        assert(cmd == DDR_NOOP);
                        assert(cmd == DDR_NOOP);
                        if (m_reset_counts > 140)
                        if (m_reset_counts > 140) {
                                m_reset_state = 16;
                                m_reset_state = 16;
 
                                printf("DDR3-SDRAM: Leaving reset state\n");
 
                        }
                        break;
                        break;
                default:
                default:
                        break;
                        break;
                }
                }
 
 

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