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# A Wishbone Controlled Scope for FPGA's
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# A Wishbone Controlled Scope for FPGA's
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This is a generic/library routine for providing a bus accessed 'scope' or
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This is a generic/library routine for providing a bus accessed 'scope' or
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(perhaps more appropriately) a bus accessed logic analyzer for use internal to
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(perhaps more appropriately) a bus accessed logic analyzer for use internal to
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an FPGA. The general operation is such that this 'scope' can record and report
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an FPGA. The general operation is such that this 'scope' can record and report
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on any 32 bit value transiting through the FPGA. Once started and reset, the
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on any 32 bit value transiting through the FPGA that you have connected to the
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scope. Once started and reset, the
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scope records a copy of the input data every time the clock ticks with the
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scope records a copy of the input data every time the clock ticks with the
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circuit enabled. That is, it records these values up until the trigger. Once
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circuit enabled. That is, it records these values up until the trigger. Once
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the trigger goes high, the scope will record for ``bw_holdoff`` more counts
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the trigger goes high, the scope will record for ``bw_holdoff`` more counts
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before stopping. Values may then be read from the buffer, oldest to most
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before stopping. Values may then be read from the buffer, oldest to most
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recent. After reading, the scope may then be reset for another run.
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recent. After reading, the scope may then be reset for another run.
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- oldest to most recent
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- oldest to most recent
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- one value per bus clock
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- one value per bus clock
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7. Writes to the data register reset the address to the beginning of the buffer
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7. Writes to the data register reset the address to the beginning of the buffer
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# Tutorials
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The Wishbone scope was featured on [zipcpu.com](http://zipcpu.com) as [a
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conclusion](http://zipcpu.com/blog/2017/07/08/getting-started-with-wbscope.html)
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to the discussion of the example [debugging
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bus](https://github.com/ZipCPU/dbgbus/tree/master/hexbus).
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That example discussed how to hook up the scope to your logic, as well as how
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to employ the [scope software](sw/scopecls.cpp) to create a VCD file
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that could then be viewed in GTKWave.
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The scope was also mentioned as a means of capturing [traces of button
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bounces](http://zipcpu.com/blog/2017/08/02/debounce-teaser.html),
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with the short discussion of how to set it up for that task
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[here](http://zipcpu.com/blog/2017/08/07/bounce-dbgbus.html).
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# Interfaces supported
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1. [Wishbone B4/pipelined](rtl/wbscope.v)
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2. [AXI lite](rtl/axi4lscope.v)
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3. [Avalon](rtl/avscope.v)
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# Commercial Applications
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# Commercial Applications
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Should you find the GPLv3 license insufficient for your needs, other licenses
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Should you find the GPLv3 license insufficient for your needs, other licenses
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can be purchased from Gisselquist Technology, LLC.
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can be purchased from [Gisselquist Technology,
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LLC](http://zipcpu.com/about/gisselquist-technology.html).
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