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///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: wbscopc.v
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// Filename: wbscopc.v
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//
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//
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// Project: FPGA Library of Routines
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// Project: WBScope, a wishbone hosted scope
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//
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//
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// Purpose: This scope is identical in function to the wishbone scope
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// Purpose: This scope is identical in function to the wishbone scope
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// found in wbscope, save that the output is compressed and that (as a
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// found in wbscope, save that the output is compressed and that (as a
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// result) it can only handle recording 31 bits at a time. This allows
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// result) it can only handle recording 31 bits at a time. This allows
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// the top bit to indicate an 'address difference'. Okay, there's
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// the top bit to indicate an 'address difference'. Okay, there's
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// are valuable, but could never be done if the scope wasn't compressed.
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// are valuable, but could never be done if the scope wasn't compressed.
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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// Copyright (C) 2015,2017, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory. Run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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/////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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module wbscopc(i_clk, i_ce, i_trigger, i_data,
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module wbscopc(i_clk, i_ce, i_trigger, i_data,
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i_wb_clk, i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr, i_wb_data,
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i_wb_clk, i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr, i_wb_data,
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o_wb_ack, o_wb_stall, o_wb_data,
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o_wb_ack, o_wb_stall, o_wb_data,
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o_interrupt);
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o_interrupt);
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parameter LGMEM = 5'd10, NELM=32, BUSW = 32, SYNCHRONOUS=1;
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parameter LGMEM = 5'd10, NELM=31, BUSW = 32, SYNCHRONOUS=1;
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// The input signals that we wish to record
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// The input signals that we wish to record
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input i_clk, i_ce, i_trigger;
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input i_clk, i_ce, i_trigger;
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input [(NELM-1):0] i_data;
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input [(NELM-1):0] i_data;
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// The WISHBONE bus for reading and configuring this scope
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// The WISHBONE bus for reading and configuring this scope
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input i_wb_clk, i_wb_cyc, i_wb_stb, i_wb_we;
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input i_wb_clk, i_wb_cyc, i_wb_stb, i_wb_we;
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// wbscope program, and suffer a lack of several features
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// wbscope program, and suffer a lack of several features
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// When is the full scope reset? Capture that reset bit from any
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// When is the full scope reset? Capture that reset bit from any
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// write.
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// write.
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wire lcl_reset;
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wire lcl_reset;
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assign lcl_reset = (i_wb_cyc)&&(i_wb_stb)&&(~i_wb_addr)&&(i_wb_we)
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assign lcl_reset = (i_wb_stb)&&(~i_wb_addr)&&(i_wb_we)
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&&(~i_wb_data[31]);
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&&(~i_wb_data[31]);
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// A big part of this scope is the 'address' of any particular
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// A big part of this scope is the 'address' of any particular
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// data value. As of this current version, the 'address' changed
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// data value. As of this current version, the 'address' changed
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// in definition from an absolute time (which had all kinds of
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// in definition from an absolute time (which had all kinds of
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else if (&ck_addr)
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else if (&ck_addr)
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; // Saturated (non-overflowing) address diff
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; // Saturated (non-overflowing) address diff
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else
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else
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ck_addr <= ck_addr + 1;
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ck_addr <= ck_addr + 1;
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wire [(BUSW-2):0] w_data;
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generate
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if (NELM == BUSW-1)
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assign w_data = i_data;
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else
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assign w_data = { {(BUSW-NELM-1){1'b0}}, i_data };
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endgenerate
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//
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//
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// To do our compression, we keep track of two registers: the most
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// To do our compression, we keep track of two registers: the most
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// recent data to the device (imm_ prefix) and the data from one
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// recent data to the device (imm_ prefix) and the data from one
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// clock ago. This allows us to suppress writes to the scope which
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// clock ago. This allows us to suppress writes to the scope which
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// would otherwise be two address writes in a row.
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// would otherwise be two address writes in a row.
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lst_val <= 31'h0;
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lst_val <= 31'h0;
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lst_adr <= 1'b1;
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lst_adr <= 1'b1;
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lst_dat <= 0;
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lst_dat <= 0;
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end else if ((i_ce)&&(i_data != lst_dat))
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end else if ((i_ce)&&(i_data != lst_dat))
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begin
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begin
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imm_val <= { {(BUSW-1-NELM){1'b0}}, i_data };
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imm_val <= w_data;
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imm_adr <= 1'b0;
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imm_adr <= 1'b0;
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lst_val <= imm_val;
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lst_val <= imm_val;
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lst_adr <= imm_adr;
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lst_adr <= imm_adr;
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lst_dat <= i_data;
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lst_dat <= i_data;
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end else begin
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end else begin
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