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[/] [wbuart32/] [trunk/] [bench/] [verilog/] [Makefile] - Diff between revs 2 and 5

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##
##
## Purpose:     To direct the Verilator build of the Verilog portion of the
## Purpose:     To direct the Verilator build of the Verilog portion of the
##              bench test.  The result is C++ code (built by Verilator), that
##              bench test.  The result is C++ code (built by Verilator), that
##      is then built (herein) into a library.
##      is then built (herein) into a library.
##
##
## Targets:     The default target, all, builds the target test, which includes
## ALTERNATE_PURPOSE:
##              the linetest Verilator library necessary for testing.
##      All of the Verilog files within this directory may be made top level
 
##      files in their own right for the purpose of testing the UART capability
 
##      of your board.  Should you wish to test these as toplevel files, you
 
##      will need to remove the i_setup from the input, and set it to something
 
##      like:
 
##              wire    [29:0]  i_setup;
 
##
 
##              // If we have a 100MHz clock, then we can set up for a 115,200
 
##              // baud clock by setting i_setup to (100MHz / 115200) ~= 868.
 
##              // The upper bits of this number also set the protocol to
 
##              // one stop bit, no parity, and 8 data  bits.
 
##              assign  i_setup = 30'd868;      // 115,200 Baud 8N1
 
##
 
##      Using this purpose, the UART ports of a new piece of hardware may be
 
##      proven.  To do this,
 
##              1. get BLINKY working first--to prove that the clock works like
 
##                      you think it does.  Then, once BLINKY is running,
 
##              2. get helloworld working.  This requires only the clock and
 
##                      the output UART pin to work.
 
##              (Aside) 3. Once helloworld works, you should be able to get
 
##                      speechfifo to work with no further hassles.
 
##              4. After helloworld works, switch to getting linetest running on
 
##                      your hardware.  This will prove that you have not only
 
##                      the clock and output UART pin working, but that you also
 
##                      have the input UART pin working as well.
 
##
 
## Targets:     The default target of this makefile, all, builds the target
 
##              test, which includes the linetest Verilator library, the
 
##      helloworld Verilator library, and the speechfifo Verilator library--all
 
##      necessary for bench testing using the C++ files in bench/cpp.
##
##
## Creator:     Dan Gisselquist, Ph.D.
## Creator:     Dan Gisselquist, Ph.D.
##              Gisselquist Technology, LLC
##              Gisselquist Technology, LLC
##
##
################################################################################
################################################################################
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CXX   := g++
CXX   := g++
FBDIR := .
FBDIR := .
VDIRFB:= $(FBDIR)/obj_dir
VDIRFB:= $(FBDIR)/obj_dir
RTLDR := ../../rtl
RTLDR := ../../rtl
 
 
.PHONY: test
.PHONY: test testline testhello speechfifo
test: $(VDIRFB)/Vlinetest__ALL.a
test: testline testhello speechfifo
 
testline:  $(VDIRFB)/Vlinetest__ALL.a
 
testhello: $(VDIRFB)/Vhelloworld__ALL.a
 
speechfifo: $(VDIRFB)/Vspeechfifo__ALL.a
 
 
$(VDIRFB)/Vlinetest__ALL.a: $(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp
$(VDIRFB)/Vlinetest__ALL.a: $(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp
$(VDIRFB)/Vlinetest__ALL.a: $(VDIRFB)/Vlinetest.mk
$(VDIRFB)/Vlinetest__ALL.a: $(VDIRFB)/Vlinetest.mk
$(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp $(VDIRFB)/Vlinetest.mk: linetest.v
$(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp $(VDIRFB)/Vlinetest.mk: linetest.v
$(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp $(VDIRFB)/Vlinetest.mk: $(RTLDR)/rxuart.v $(RTLDR)/txuart.v
$(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp $(VDIRFB)/Vlinetest.mk: $(RTLDR)/rxuart.v $(RTLDR)/txuart.v
 
 
 
$(VDIRFB)/Vhelloworld__ALL.a: $(VDIRFB)/Vhelloworld.h $(VDIRFB)/Vhelloworld.cpp
 
$(VDIRFB)/Vhelloworld__ALL.a: $(VDIRFB)/Vhelloworld.mk
 
$(VDIRFB)/Vhelloworld.h $(VDIRFB)/Vhelloworld.cpp $(VDIRFB)/Vhelloworld.mk: helloworld.v
 
$(VDIRFB)/Vhelloworld.h $(VDIRFB)/Vhelloworld.cpp $(VDIRFB)/Vhelloworld.mk: $(RTLDR)/rxuart.v $(RTLDR)/txuart.v
 
 
 
SPEECHSRCS := $(addprefix $(RTLDR)/,rxuart.v txuart.v ufifo.v wbuart.v)
 
SPEECHVFILES:= $(addprefix $(VDIRFB)/,Vspeechfifo.h Vspeechfifo.cpp Vspeechfifo.mk)
 
$(VDIRFB)/Vspeechfifo__ALL.a: $(VDIRFB)/Vspeechfifo.h $(VDIRFB)/Vspeechfifo.cpp
 
$(VDIRFB)/Vspeechfifo__ALL.a: $(VDIRFB)/Vspeechfifo.mk
 
$(SPEECHVFILES): speechfifo.v $(SPEECHSRCS)
 
 
$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
        verilator -cc -y ../../rtl $*.v
        verilator --trace -cc -y ../../rtl $*.v
 
 
$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
        cd $(VDIRFB); make -f V$*.mk
        cd $(VDIRFB); make -f V$*.mk
 
 
.PHONY: clean
.PHONY: clean

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