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[/] [wbuart32/] [trunk/] [rtl/] [txuart.v] - Diff between revs 9 and 14

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Rev 9 Rev 14
Line 169... Line 169...
        always  @(posedge i_clk)
        always  @(posedge i_clk)
                q_rts <= i_rts;
                q_rts <= i_rts;
        always  @(posedge i_clk)
        always  @(posedge i_clk)
                qq_rts <= q_rts;
                qq_rts <= q_rts;
        always  @(posedge i_clk)
        always  @(posedge i_clk)
                ck_rts <= (qq_rts)&&(hw_flow_control);
                ck_rts <= (qq_rts)||(!hw_flow_control);
 
 
        initial o_uart_tx = 1'b1;
        initial o_uart_tx = 1'b1;
        initial r_busy = 1'b1;
        initial r_busy = 1'b1;
        initial state  = `TXU_IDLE;
        initial state  = `TXU_IDLE;
        initial lcl_data= 8'h0;
        initial lcl_data= 8'h0;
Line 253... Line 253...
        // Our setup register.  Accept changes between any pair of transmitted
        // Our setup register.  Accept changes between any pair of transmitted
        // words.  The register itself has many fields to it.  These are
        // words.  The register itself has many fields to it.  These are
        // broken out up top, and indicate what 1) our baud rate is, 2) our
        // broken out up top, and indicate what 1) our baud rate is, 2) our
        // number of stop bits, 3) what type of parity we are using, and 4)
        // number of stop bits, 3) what type of parity we are using, and 4)
        // the size of our data word.
        // the size of our data word.
        initial r_setup = INITIAL_SETUP[30:0];
        initial r_setup = INITIAL_SETUP;
        always @(posedge i_clk)
        always @(posedge i_clk)
                if (state == `TXU_IDLE)
                if (state == `TXU_IDLE)
                        r_setup <= i_setup;
                        r_setup <= i_setup;
 
 
        // lcl_data
        // lcl_data

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