#!/bin/sh
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#!/bin/sh
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#=======================================================================
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#=======================================================================
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# Project Monophony
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# Project Monophony
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# Wire-Frame 3D Graphics Accelerator IP Core
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# Wire-Frame 3D Graphics Accelerator IP Core
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#
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#
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# File:
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# File:
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# run_icarus.sh
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# run_icarus.sh
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#
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#
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# Abstract:
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# Abstract:
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# Icarus Verilog simulation script
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# Icarus Verilog simulation script
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#
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#
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# Author:
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# Author:
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# Kenji Ishimaru (info.wf3d@gmail.com)
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# Kenji Ishimaru (info.info.wf3d@gmail.com)
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#
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#
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#======================================================================
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#======================================================================
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#
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#
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# Copyright (c) 2015, Kenji Ishimaru
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# Copyright (c) 2015, Kenji Ishimaru
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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# modification, are permitted provided that the following conditions are met:
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#
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#
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# -Redistributions of source code must retain the above copyright notice,
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# -Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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# this list of conditions and the following disclaimer.
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# -Redistributions in binary form must reproduce the above copyright notice,
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# -Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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# and/or other materials provided with the distribution.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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# Revision History
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# Revision History
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RTL_DIR="../rtl"
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RTL_DIR="../rtl"
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TOP_MODULE=top
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TOP_MODULE=top
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sim_file=$1
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sim_file=$1
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echo "FILE=" $sim_file
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echo "FILE=" $sim_file
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iverilog \
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iverilog \
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-c ../bin/icarus.cmd \
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-c ../bin/icarus.cmd \
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-D VSIM \
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-D VSIM \
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-D RTL_DEBUG \
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-D RTL_DEBUG \
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-y . \
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-y . \
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-y ${RTL_DIR} \
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-y ${RTL_DIR} \
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-y ${RTL_DIR}/core \
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-y ${RTL_DIR}/core \
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-y ../behavior \
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-y ../behavior \
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-y ../scenario/3d \
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-y ../scenario/3d \
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-o ${TOP_MODULE} \
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-o ${TOP_MODULE} \
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timescale.v \
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timescale.v \
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${sim_file}
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${sim_file}
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if [ $? -gt 0 ]; then
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if [ $? -gt 0 ]; then
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echo "iverilog compile error!"
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echo "iverilog compile error!"
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exit 1
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exit 1
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fi
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fi
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if [ ! -e ./vpi.vpi ]; then
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if [ ! -e ./vpi.vpi ]; then
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iverilog-vpi ../bin/vpi/vpi.c
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iverilog-vpi ../bin/vpi/vpi.c
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fi
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fi
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if [ $? -gt 0 ]; then
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if [ $? -gt 0 ]; then
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echo "iverilog-vpi compile error!"
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echo "iverilog-vpi compile error!"
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exit 1
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exit 1
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fi
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fi
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vvp -m ./vpi.vpi top
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vvp -m ./vpi.vpi top
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