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[/] [xulalx25soc/] [trunk/] [xilinx/] [Makefile] - Diff between revs 6 and 7

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Line 10... Line 10...
##      if you bust timing, you may never know it--nothing will tell you it
##      if you bust timing, you may never know it--nothing will tell you it
##      failed.  Second, the output file is different from the output file
##      failed.  Second, the output file is different from the output file
##      produced via ISE.  Still ... for a command line make script, it is a
##      produced via ISE.  Still ... for a command line make script, it is a
##      (good) start.
##      (good) start.
##
##
 
##      Makefile targets:
 
##
 
##      xula.bit        The FPGA bitfile or configuration file
 
##
 
##      objdir          Makes a directory for temporary build files, which can
 
##                      then be removed later with a clean target.  While a
 
##                      great idea in principle, this doesn't work well in
 
##                      practice since Xilinx's ISE never uses it.
 
##
 
##      clean           Removes intermediate build files.
##
##
## Creator:     Dan Gisselquist, Ph.D.
## Creator:     Dan Gisselquist, Ph.D.
##              Gisselquist Technology, LLC
##              Gisselquist Technology, LLC
##
##
################################################################################
################################################################################
Line 52... Line 62...
SRCDIR      := ../rtl
SRCDIR      := ../rtl
CPUDIR      := ../rtl/cpu
CPUDIR      := ../rtl/cpu
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v wbucompress.v           \
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v wbucompress.v           \
        wbudecompress.v wbudeword.v wbuexec.v wbuidleint.v wbuinput.v   \
        wbudecompress.v wbudeword.v wbuexec.v wbuidleint.v wbuinput.v   \
        wbuoutput.v wbureadcw.v wbusixchar.v wbutohex.v
        wbuoutput.v wbureadcw.v wbusixchar.v wbutohex.v
PERIPHERALS: wbgpio.v wbpwmaudio.v rxuart.v txuart.v rtcdate.v rtclight.v
PERIPHERALS: wbgpio.v wbpwmaudio.v rxuart.v txuart.v uartdev.v          \
 
        rtcdate.v rtclight.v
CPUSRC := zipsystem.v                                                   \
CPUSRC := zipsystem.v                                                   \
        busdelay.v wbarbiter.v wbdblpriarb.v                            \
        busdelay.v wbarbiter.v wbdblpriarb.v                            \
        zipcpu.v cpuops.v pfcache.v idecode.v pipemem.v pipefetch.v div.v \
        zipcpu.v cpuops.v pfcache.v idecode.v pipemem.v pipefetch.v div.v \
        zipcounter.v zipjiffies.v ziptimer.v wbdmac.v wbwatchdog.v
        zipcounter.v zipjiffies.v ziptimer.v wbdmac.v wbwatchdog.v
SOURCES     := toplevel.v jtagser.v busmaster.v                         \
SOURCES     := toplevel.v jtagser.v busmaster.v                         \

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