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Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [xula.ucf] - Diff between revs 6 and 71

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Rev 6 Rev 71
Line 74... Line 74...
 
 
##############################
##############################
# Prototyping Header
# Prototyping Header
##############################
##############################
# NET io_chan_clk     LOC = T7;   # L32N
# NET io_chan_clk     LOC = T7;   # L32N
NET i_rx_uart     LOC = R7;   # L32P
NET i_rx_uart     LOC = B15;   # L32P
NET i_gpio<0>     LOC = R15;  # L49P
NET i_gpio<0>     LOC = R15;  # L49P
NET i_gpio<1>     LOC = R16;  # L49N
NET i_gpio<1>     LOC = R16;  # L49N
NET i_gpio<2>     LOC = M15;  # L46P
NET i_gpio<2>     LOC = M15;  # L46P
NET i_gpio<3>     LOC = M16;  # L46N
NET i_gpio<3>     LOC = M16;  # L46N
NET i_gpio<4>     LOC = K15;  # L44P
NET i_gpio<4>     LOC = K15;  # L44P
Line 87... Line 87...
NET i_gpio<7>     LOC = J14;  # L43P
NET i_gpio<7>     LOC = J14;  # L43P
NET i_gpio<8>     LOC = F15;  # L35P
NET i_gpio<8>     LOC = F15;  # L35P
NET i_gpio<9>     LOC = F16;  # L35N
NET i_gpio<9>     LOC = F16;  # L35N
NET i_gpio<10>    LOC = C16;  # L33N
NET i_gpio<10>    LOC = C16;  # L33N
NET i_gpio<11>    LOC = C15;  # L33P
NET i_gpio<11>    LOC = C15;  # L33P
NET i_gpio<12>    LOC = B16;  # L29N
NET i_gpio<12>    LOC = R2;  # L29N
NET i_gpio<13>    LOC = B15;  # L29P
NET i_gpio<13>    LOC = R7;  # L29P
NET o_pwm        LOC = T4;   # L63N (No differential pair!)
NET o_pwm        LOC = T4;   # L63N (No differential pair!)
NET o_tx_uart    LOC = R2;   # L32P
NET o_tx_uart    LOC = B16;   # L32P
NET o_gpio<0>    LOC = R1;   # L32N
NET o_gpio<0>    LOC = R1;   # L32N
NET o_gpio<1>    LOC = M2;   # L35P
NET o_gpio<1>    LOC = M2;   # L35P
NET o_gpio<2>    LOC = M1;   # L35N
NET o_gpio<2>    LOC = M1;   # L35N
NET o_gpio<3>    LOC = K3;   # L42P
NET o_gpio<3>    LOC = K3;   # L42P
NET o_gpio<4>    LOC = J4;   # L42N
NET o_gpio<4>    LOC = J4;   # L42N
Line 138... Line 138...
##############################
##############################
# Clock Nets
# Clock Nets
##############################
##############################
NET "i_clk_12mhz" TNM_NET = "i_clk_12mhz";
NET "i_clk_12mhz" TNM_NET = "i_clk_12mhz";
NET "i_ram_feedback_clk" TNM_NET = "i_ram_feedback_clk";
NET "i_ram_feedback_clk" TNM_NET = "i_ram_feedback_clk";
TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 83.333333 ns HIGH 50%;
TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 82 ns HIGH 50%;
 
# TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 83.333333 ns HIGH 50%;
# TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 10.0 ns HIGH 50%;
# TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 10.0 ns HIGH 50%;
TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 11.3 ns HIGH 50%;
TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 11.3 ns HIGH 50%;

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