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https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
[/] [xulalx25soc/] [trunk/] [xula.ucf] - Diff between revs 113 and 117
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| Rev 113 |
Rev 117 |
| Line 138... |
Line 138... |
##############################
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##############################
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# Clock Nets
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# Clock Nets
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##############################
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##############################
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NET "i_clk_12mhz" TNM_NET = "i_clk_12mhz";
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NET "i_clk_12mhz" TNM_NET = "i_clk_12mhz";
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NET "i_ram_feedback_clk" TNM_NET = "i_ram_feedback_clk";
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NET "i_ram_feedback_clk" TNM_NET = "i_ram_feedback_clk";
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TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 82.0 ns HIGH 50%;
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TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 83.0 ns HIGH 50%;
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# TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 83.333333 ns HIGH 50%;
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# TIMESPEC "TSi_clk_12mhz" = PERIOD "i_clk_12mhz" 83.333333 ns HIGH 50%;
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# TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 10.0 ns HIGH 50%;
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# TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 10.0 ns HIGH 50%;
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TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 11.3 ns HIGH 50%;
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TIMESPEC "TSi_ram_feedback_clk" = PERIOD "i_ram_feedback_clk" 11.3 ns HIGH 50%;
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