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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [dv/] [io_ports/] [io_ports_tb.v] - Diff between revs 2 and 22

Rev 2	Rev 22
Line 47...	Line 47...
`initial begin`	`initial begin`
`clock = 0;`	`clock = 0;`
`end`	`end`

`initial begin`	`initial begin`
	`ifdef WFDUMP
`$dumpfile("io_ports.vcd");`	`$dumpfile("io_ports.vcd");`
`$dumpvars(0, io_ports_tb);`	`$dumpvars(0, io_ports_tb);`
	`endif

`// Repeat cycles of 1000 clock edges as needed to complete testbench`	`// Repeat cycles of 1000 clock edges as needed to complete testbench`
`repeat (25) begin`	`repeat (25) begin`
`repeat (1000) @(posedge clock);`	`repeat (1000) @(posedge clock);`
`// $display("+1000 cycles");`	`// $display("+1000 cycles");`