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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [rtl/] [lib/] [wb_interface.v] - Diff between revs 3 and 5

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////  OMS 8051 cores common library Module                        ////
 
////  yifive common library Module                                ////
 
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////  This file is part of the OMS 8051 cores project             ////
 
////  This file is part of the yifive cores project               ////
 
////  http://www.opencores.org/cores/oms8051mini/                 ////
 
////  http://www.opencores.org/cores/yifive/                      ////
 
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////  Description                                                 ////
 
////  Description:                                                ////
 
////  OMS 8051 definitions.                                       ////
 
////     This module does the DMA to westboone I/f                ////
 
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////  To Do:                                                      ////
 
////  To Do:                                                      ////
 
////    nothing                                                   ////
 
////    nothing                                                   ////
 
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////  Author(s):                                                  ////
 
////  Author(s):                                                  ////
 
////      - Dinesh Annayya, dinesha@opencores.org                 ////
 
////      - Dinesh Annayya, dinesha@opencores.org                 ////
 
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////  Revision : Nov 26, 2016                                     //// 
////  Revision :                                                  ////
 
 
 
////     v0:    Nov 26, 2016, Dinesh A                            ////
 
 
 
////            This files copied from my open core               ////
 
 
 
////             turbo8051 project                                ////
 
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//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
 
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
 
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