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Line 55... |
//-------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------
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// Local signals declaration
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// Local signals declaration
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//-------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------
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logic [`SCR1_IMEM_DWIDTH-1:0] instr;
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logic [`SCR1_IMEM_DWIDTH-1:0] instr;
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type_scr1_instr_type_e instr_type;
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logic [1:0] instr_type;
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type_scr1_rvi_opcode_e rvi_opcode;
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logic [6:2] rvi_opcode;
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logic rvi_illegal;
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logic rvi_illegal;
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logic [2:0] funct3;
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logic [2:0] funct3;
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logic [6:0] funct7;
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logic [6:0] funct7;
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logic [11:0] funct12;
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logic [11:0] funct12;
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logic [4:0] shamt;
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logic [4:0] shamt;
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Line 78... |
assign idu2ifu_rdy_o = exu2idu_rdy_i;
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assign idu2ifu_rdy_o = exu2idu_rdy_i;
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assign idu2exu_req_o = ifu2idu_vd_i;
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assign idu2exu_req_o = ifu2idu_vd_i;
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assign instr = ifu2idu_instr_i;
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assign instr = ifu2idu_instr_i;
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// RVI / RVC
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// RVI / RVC
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`ifdef YOSYS
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assign instr_type = instr[1:0];
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assign instr_type = 2'(instr[1:0]);
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`else
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assign instr_type = type_scr1_instr_type_e'(instr[1:0]);
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`endif
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// RVI / RVC fields
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// RVI / RVC fields
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`ifdef YOSYS
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assign rvi_opcode = instr[6:2]; // RVI
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assign rvi_opcode = 5'(instr[6:2]); // RVI
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`else
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assign rvi_opcode = type_scr1_rvi_opcode_e'(instr[6:2]); // RVI
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`endif
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assign funct3 = (instr_type == SCR1_INSTR_RVI) ? instr[14:12] : instr[15:13]; // RVI / RVC
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assign funct3 = (instr_type == SCR1_INSTR_RVI) ? instr[14:12] : instr[15:13]; // RVI / RVC
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assign funct7 = instr[31:25]; // RVI
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assign funct7 = instr[31:25]; // RVI
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assign funct12 = instr[31:20]; // RVI (SYSTEM)
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assign funct12 = instr[31:20]; // RVI (SYSTEM)
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assign shamt = instr[24:20]; // RVI
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assign shamt = instr[24:20]; // RVI
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