| Line 111... |
Line 111... |
DHI_STATE_HALT_REQ,
|
DHI_STATE_HALT_REQ,
|
DHI_STATE_RESUME_REQ,
|
DHI_STATE_RESUME_REQ,
|
DHI_STATE_RESUME_RUN
|
DHI_STATE_RESUME_RUN
|
} type_scr1_dhi_fsm_e;
|
} type_scr1_dhi_fsm_e;
|
|
|
typedef enum logic [SCR1_DBG_ABSTRACTCS_CMDERR_WDTH:0] {
|
//typedef enum logic [SCR1_DBG_ABSTRACTCS_CMDERR_WDTH:0] {
|
ABS_ERR_NONE = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d0),
|
parameter ABS_ERR_NONE = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d0);
|
ABS_ERR_BUSY = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d1),
|
parameter ABS_ERR_BUSY = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d1);
|
ABS_ERR_CMD = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d2),
|
parameter ABS_ERR_CMD = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d2);
|
ABS_ERR_EXCEPTION = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d3),
|
parameter ABS_ERR_EXCEPTION = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d3);
|
ABS_ERR_NOHALT = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d4)
|
parameter ABS_ERR_NOHALT = (SCR1_DBG_ABSTRACTCS_CMDERR_WDTH+1)'('d4);
|
} type_scr1_abs_err_e;
|
//} type_scr1_abs_err_e;
|
|
|
|
|
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
// Local parameters declaration
|
// Local parameters declaration
|
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
| Line 360... |
Line 360... |
|
|
logic abs_err_acc_busy_upd;
|
logic abs_err_acc_busy_upd;
|
logic abs_err_acc_busy_ff;
|
logic abs_err_acc_busy_ff;
|
logic abs_err_acc_busy_next;
|
logic abs_err_acc_busy_next;
|
|
|
type_scr1_abs_err_e abstractcs_cmderr_ff;
|
logic [SCR1_DBG_ABSTRACTCS_CMDERR_WDTH:0] abstractcs_cmderr_ff;
|
type_scr1_abs_err_e abstractcs_cmderr_next;
|
logic [SCR1_DBG_ABSTRACTCS_CMDERR_WDTH:0] abstractcs_cmderr_next;
|
|
|
// Abstract instruction signals
|
// Abstract instruction signals
|
//------------------------------------------------------------------------------
|
//------------------------------------------------------------------------------
|
|
|
// Abstract instruction execution request register
|
// Abstract instruction execution request register
|
