| Line 12... |
Line 12... |
input logic clk,
|
input logic clk,
|
|
|
// Core Interface
|
// Core Interface
|
output logic dmem_req_ack,
|
output logic dmem_req_ack,
|
input logic dmem_req,
|
input logic dmem_req,
|
input type_scr1_mem_cmd_e dmem_cmd,
|
input logic dmem_cmd,
|
input type_scr1_mem_width_e dmem_width,
|
input logic [1:0] dmem_width,
|
input logic [SCR1_AHB_WIDTH-1:0] dmem_addr,
|
input logic [SCR1_AHB_WIDTH-1:0] dmem_addr,
|
input logic [SCR1_AHB_WIDTH-1:0] dmem_wdata,
|
input logic [SCR1_AHB_WIDTH-1:0] dmem_wdata,
|
output logic [SCR1_AHB_WIDTH-1:0] dmem_rdata,
|
output logic [SCR1_AHB_WIDTH-1:0] dmem_rdata,
|
output type_scr1_mem_resp_e dmem_resp,
|
output logic [1:0] dmem_resp,
|
|
|
// AHB Interface
|
// AHB Interface
|
output logic [3:0] hprot,
|
output logic [3:0] hprot,
|
output logic [2:0] hburst,
|
output logic [2:0] hburst,
|
output logic [2:0] hsize,
|
output logic [2:0] hsize,
|
| Line 76... |
Line 76... |
|
|
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
// Local functions
|
// Local functions
|
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
function automatic logic [2:0] scr1_conv_mem2ahb_width (
|
function automatic logic [2:0] scr1_conv_mem2ahb_width (
|
input type_scr1_mem_width_e dmem_width
|
input logic [1:0] dmem_width
|
);
|
);
|
logic [2:0] tmp;
|
logic [2:0] tmp;
|
begin
|
begin
|
case (dmem_width)
|
case (dmem_width)
|
SCR1_MEM_WIDTH_BYTE : begin
|
SCR1_MEM_WIDTH_BYTE : begin
|
| Line 100... |
Line 100... |
end
|
end
|
endfunction
|
endfunction
|
|
|
function automatic logic[SCR1_AHB_WIDTH-1:0] scr1_conv_mem2ahb_wdata (
|
function automatic logic[SCR1_AHB_WIDTH-1:0] scr1_conv_mem2ahb_wdata (
|
input logic [1:0] dmem_addr,
|
input logic [1:0] dmem_addr,
|
input type_scr1_mem_width_e dmem_width,
|
input logic [1:0] dmem_width,
|
input logic [SCR1_AHB_WIDTH-1:0] dmem_wdata
|
input logic [SCR1_AHB_WIDTH-1:0] dmem_wdata
|
);
|
);
|
logic [SCR1_AHB_WIDTH-1:0] tmp;
|
logic [SCR1_AHB_WIDTH-1:0] tmp;
|
begin
|
begin
|
tmp = 'x;
|
tmp = 'x;
|
