| Line 16... |
Line 16... |
input logic clk,
|
input logic clk,
|
|
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// Core interface
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// Core interface
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output logic imem_req_ack,
|
output logic imem_req_ack,
|
input logic imem_req,
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input logic imem_req,
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input type_scr1_mem_cmd_e imem_cmd,
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input logic imem_cmd,
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input logic [`SCR1_IMEM_AWIDTH-1:0] imem_addr,
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input logic [`SCR1_IMEM_AWIDTH-1:0] imem_addr,
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output logic [`SCR1_IMEM_DWIDTH-1:0] imem_rdata,
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output logic [`SCR1_IMEM_DWIDTH-1:0] imem_rdata,
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output type_scr1_mem_resp_e imem_resp,
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output logic [1:0] imem_resp,
|
|
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// PORT0 interface
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// PORT0 interface
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input logic port0_req_ack,
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input logic port0_req_ack,
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output logic port0_req,
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output logic port0_req,
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output type_scr1_mem_cmd_e port0_cmd,
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output logic port0_cmd,
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output logic [`SCR1_IMEM_AWIDTH-1:0] port0_addr,
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output logic [`SCR1_IMEM_AWIDTH-1:0] port0_addr,
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input logic [`SCR1_IMEM_DWIDTH-1:0] port0_rdata,
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input logic [`SCR1_IMEM_DWIDTH-1:0] port0_rdata,
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input type_scr1_mem_resp_e port0_resp,
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input logic [1:0] port0_resp,
|
|
|
// PORT1 interface
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// PORT1 interface
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input logic port1_req_ack,
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input logic port1_req_ack,
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output logic port1_req,
|
output logic port1_req,
|
output type_scr1_mem_cmd_e port1_cmd,
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output logic port1_cmd,
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output logic [`SCR1_IMEM_AWIDTH-1:0] port1_addr,
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output logic [`SCR1_IMEM_AWIDTH-1:0] port1_addr,
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input logic [`SCR1_IMEM_DWIDTH-1:0] port1_rdata,
|
input logic [`SCR1_IMEM_DWIDTH-1:0] port1_rdata,
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input type_scr1_mem_resp_e port1_resp
|
input logic [1:0] port1_resp
|
);
|
);
|
|
|
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
// Local types declaration
|
// Local types declaration
|
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
| Line 53... |
Line 53... |
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
type_scr1_fsm_e fsm;
|
type_scr1_fsm_e fsm;
|
logic port_sel;
|
logic port_sel;
|
logic port_sel_r;
|
logic port_sel_r;
|
logic [`SCR1_IMEM_DWIDTH-1:0] sel_rdata;
|
logic [`SCR1_IMEM_DWIDTH-1:0] sel_rdata;
|
type_scr1_mem_resp_e sel_resp;
|
logic [1:0] sel_resp;
|
logic sel_req_ack;
|
logic sel_req_ack;
|
|
|
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
// FSM
|
// FSM
|
//-------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------
|
