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[/] [zap/] [trunk/] [src/] [rtl/] [cpu/] [zap_predecode_mem_fsm.v] - Diff between revs 38 and 43

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// TODO: Fix SWAP instruction. 
 
 
 
// -----------------------------------------------------------------------------
// -----------------------------------------------------------------------------
// --                                                                         --
// --                                                                         --
// --                   (C) 2016-2018 Revanth Kamaraj.                        --
// --                   (C) 2016-2018 Revanth Kamaraj.                        --
// --                                                                         -- 
// --                                                                         -- 
// -- --------------------------------------------------------------------------
// -- --------------------------------------------------------------------------
Line 81... Line 79...
`include "zap_localparams.vh"
`include "zap_localparams.vh"
`include "zap_functions.vh"
`include "zap_functions.vh"
 
 
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
 
 
//
 
// Instruction breakup
// Instruction breakup
// These assignments are repeated in the function.
wire [3:0]  cc                  ;
//
wire [2:0]  id                  ;
wire [3:0] base    = i_instruction[`BASE];
wire        pre_index           ;
wire [3:0] srcdest = i_instruction[`SRCDEST];
wire        up                  ;
wire [3:0] cc      = i_instruction[31:28];
wire        s_bit               ;
wire [2:0] id      = i_instruction[27:25];
wire        writeback           ;
wire pre_index     = i_instruction[24];
wire        load                ;
wire up            = i_instruction[23];
wire [3:0]  base                ;
wire s_bit         = i_instruction[22];
wire [15:0] reglist             ;
wire writeback     = i_instruction[21];
 
wire load          = i_instruction[20];
// Instruction breakup assignment.
 
assign {cc, id, pre_index, up, s_bit, writeback, load, base, reglist} = i_instruction;
 
 
wire store         = !load;
wire store         = !load;
wire [15:0] reglist= i_instruction[15:0];
 
wire link          = i_instruction[24];
wire link          = i_instruction[24];
wire [11:0] branch_offset = i_instruction[11:0];
wire [11:0] branch_offset = i_instruction[11:0];
 
 
// Ones counter offset.
wire [11:0] oc_offset;                  // Ones counter offset.
wire [11:0] oc_offset;
reg  [3:0]  state_ff, state_nxt;        // State.
 
reg  [15:0] reglist_ff, reglist_nxt;    // Register list.
// Registers.
reg     [31:0]  const_ff, const_nxt;    // For BLX - const reg.
reg     [3:0]   state_ff, state_nxt;
 
reg     [15:0]  reglist_ff, reglist_nxt;
 
 
 
// Const reg for BLX.
 
reg     [31:0]  const_ff, const_nxt;
 
 
 
///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
 
 
// States.
// States.
localparam IDLE         = 0;
localparam IDLE         = 0;
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///////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
 
 
function [33:0] map ( input [31:0] instr, input [3:0] enc, input [15:0] list );
function [33:0] map ( input [31:0] instr, input [3:0] enc, input [15:0] list );
// These override the globals within the function scope.
// These override the globals within the function scope.
reg [3:0] base;
 
reg [3:0] srcdest;
 
reg [3:0] cc;
reg [3:0] cc;
reg [2:0] id;
reg [2:0] id;
reg pre_index;
reg pre_index;
reg up;
reg up;
reg s_bit;
reg s_bit;
reg writeback;
reg writeback;
reg load;
reg load;
reg store;
reg [3:0]       base;
reg [15:0] reglist;
reg [15:0] reglist;
 
reg             store;
reg restore;
reg restore;
begin
begin
        restore = 0;
        restore = 0;
 
 
        // All variables used inside the function depend solely on the i/p args.
        {cc, id, pre_index, up, s_bit, writeback, load, base, reglist} = instr;
        // Thus repeating the assignments.
 
 
 
        base            = instr[`BASE];
 
        srcdest         = instr[`SRCDEST];
 
        cc              = instr[31:28];
 
        id              = instr[27:25];
 
        pre_index       = instr[24];
 
        up              = instr[23];
 
        s_bit           = instr[22];
 
        writeback       = instr[21];
 
        load            = instr[20];
 
        store           = !load;
        store           = !load;
        reglist         = instr[15:0];
 
 
 
        map = instr;
        map = instr;
        map = map & ~(1<<22); // No byte access.
        map = map & ~(1<<22); // No byte access.
        map = map & ~(1<<25); // Constant Offset (of 4).
        map = map & ~(1<<25); // Constant Offset (of 4).
        map[23] = 1'd1;       // Hard wired to increment.
        map[23] = 1'd1;       // Hard wired to increment.
 
 
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end
end
endtask
endtask
 
 
// Counts the number of ones and multiplies that by 4 to get final
// Counts the number of ones and multiplies that by 4 to get final
// address offset.
// address offset.
//
 
function  [11:0] ones_counter (
function  [11:0] ones_counter (
        input [15:0]    i_word    // Register list.
        input [15:0]    i_word    // Register list.
);
);
begin: blk1
begin: blk1
        integer i;
        integer i;

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