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[/] [zap/] [trunk/] [src/] [rtl/] [cpu/] [zap_tlb_fsm.v] - Diff between revs 43 and 51

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Rev 43 Rev 51
Line 171... Line 171...
        begin
        begin
                if ( i_mmu_en )
                if ( i_mmu_en )
                begin
                begin
                        if ( i_walk )
                        if ( i_walk )
                        begin
                        begin
                                $display($time, " - %m :: Page fault! Need to page walk! i_walk = %b", i_walk);
 
                                $display($time, " - %m :: Core generated address %x", i_address);
 
                                $display($time, " - %m :: Moving to FETCH_L1_DESC. i_baddr = %x baddr_tran_base = %x addr_va_table_index = %x",
 
                                         i_baddr, i_baddr[`VA__TRANSLATION_BASE], i_address[`VA__TABLE_INDEX]);
 
 
 
                                `ifdef TLB_DEBUG
 
                                        $stop;
 
                                `endif
 
 
 
                                o_busy = 1'd1;
                                o_busy = 1'd1;
 
 
                                /*
                                /*
                                 * We need to page walk to get the page table.
                                 * We need to page walk to get the page table.
                                 * Call for access to L1 level page table.
                                 * Call for access to L1 level page table.
Line 193... Line 184...
 
 
                                state_nxt = FETCH_L1_DESC_0;
                                state_nxt = FETCH_L1_DESC_0;
                        end
                        end
                        else if ( i_fsr[3:0] != 4'b0000 ) /* Access Violation. */
                        else if ( i_fsr[3:0] != 4'b0000 ) /* Access Violation. */
                        begin
                        begin
                                $display($time, " - %m :: Access violation fsr = %x far = %x...", i_fsr, i_far);
 
 
 
                                `ifdef TLB_DEBUG
 
                                        $stop;
 
                                `endif
 
 
 
                                o_fault = 1'd1;
                                o_fault = 1'd1;
                                o_busy  = 1'd0;
                                o_busy  = 1'd0;
                                o_fsr   = i_fsr;
                                o_fsr   = i_fsr;
                                o_far   = i_far;
                                o_far   = i_far;
                        end
                        end
                        else
 
                        begin
 
                                `ifdef DISP_TLB_SUCCESS
 
                                        $display($time, " - %m :: TLB Hit for address = %x MMU enable = %x!", i_address, i_mmu_en);
 
                                `endif
 
 
 
                                `ifdef TLB_DEBUG
 
                                        $stop;
 
                                `endif
 
                        end
 
                end
                end
        end
        end
 
 
        FETCH_L1_DESC_0:
        FETCH_L1_DESC_0:
        begin
        begin
                $display($time, " - %m :: In state FETCH_L1_DESC_0");
 
 
 
                o_busy = 1;
                o_busy = 1;
 
 
                if ( i_wb_ack )
                if ( i_wb_ack )
                begin
                begin
                        dnxt = i_wb_dat;
                        dnxt = i_wb_dat;
                        state_nxt = FETCH_L1_DESC;
                        state_nxt = FETCH_L1_DESC;
 
 
                        $display($time, " - %m :: Received %x from WB. Moving to FETCH_L1_DESC...", dnxt );
 
                end
                end
                else tsk_hold_wb_access;
                else tsk_hold_wb_access;
        end
        end
 
 
        FETCH_L1_DESC:
        FETCH_L1_DESC:
Line 240... Line 211...
                /*
                /*
                 * What we would have fetched is the L1 descriptor.
                 * What we would have fetched is the L1 descriptor.
                 * Examine it. dff holds the L1 descriptor.
                 * Examine it. dff holds the L1 descriptor.
                 */
                 */
 
 
                $display($time, " - %m :: In FETCH_L1_DESC state...");
 
 
 
                o_busy = 1'd1;
                o_busy = 1'd1;
 
 
                if ( 1 )
                if ( 1 )
                begin
                begin
                        $display($time, " - %m :: ACK received. Read data is %x", i_wb_dat);
 
 
 
                        `ifdef TLB_DEBUG
 
                                $stop;
 
                        `endif
 
 
 
                        case ( dff[`ID] )
                        case ( dff[`ID] )
 
 
                        SECTION_ID:
                        SECTION_ID:
                        begin
                        begin
                                /*
                                /*
Line 266... Line 229...
                                o_setlb_wen       = 1'd1;
                                o_setlb_wen       = 1'd1;
                                o_setlb_wdata     = {i_address[`VA__SECTION_TAG],
                                o_setlb_wdata     = {i_address[`VA__SECTION_TAG],
                                                     dff};
                                                     dff};
                                state_nxt       = REFRESH_CYCLE;
                                state_nxt       = REFRESH_CYCLE;
 
 
                                $display($time, " - %m :: It is a section ID. Writing to section TLB as %x. Moving to refresh cycle...", o_setlb_wdata);
 
 
 
                                $display($time, " - %m :: #########################################################");
                                $display($time, " - %m :: #########################################################");
                                $display($time, " - %m ::             SECTION DESCRIPTOR DETAILS                  #");
                                $display($time, " - %m ::             SECTION DESCRIPTOR DETAILS                  #");
                                $display($time, " - %m :: #########################################################");
                                $display($time, " - %m :: #########################################################");
                                $display($time, " - %m :: # BASE ADDRESS  = 0x%x ", o_setlb_wdata[`SECTION_TLB__BASE]);
                                $display($time, " - %m :: # BASE ADDRESS  = 0x%x ", o_setlb_wdata[`SECTION_TLB__BASE]);
                                $display($time, " - %m :: # DAC           = 0b%b",  o_setlb_wdata[`SECTION_TLB__DAC_SEL]);
                                $display($time, " - %m :: # DAC           = 0b%b",  o_setlb_wdata[`SECTION_TLB__DAC_SEL]);
                                $display($time, " - %m :: # AP bits       = 0b%b",  o_setlb_wdata[`SECTION_TLB__AP]);
                                $display($time, " - %m :: # AP bits       = 0b%b",  o_setlb_wdata[`SECTION_TLB__AP]);
                                $display($time, " - %m :: # Cacheable     = 0b%b",  o_setlb_wdata[`SECTION_TLB__CB] >> 1);
                                $display($time, " - %m :: # Cacheable     = 0b%b",  o_setlb_wdata[`SECTION_TLB__CB] >> 1);
                                $display($time, " - %m :: # Bufferable    = 0b%b",  o_setlb_wdata[`SECTION_TLB__CB] & 2'b01);
                                $display($time, " - %m :: # Bufferable    = 0b%b",  o_setlb_wdata[`SECTION_TLB__CB] & 2'b01);
                                $display($time, " - %m :: #########################################################");
                                $display($time, " - %m :: #########################################################");
 
 
                                `ifdef TLB_DEBUG
 
                                        $stop;
 
                                `endif
 
                        end
                        end
 
 
                        PAGE_ID:
                        PAGE_ID:
                        begin
                        begin
                                /*
                                /*
Line 296... Line 253...
                                dac_nxt         = dff[`L1_PAGE__DAC_SEL];  // dac register holds the dac sel for future use.
                                dac_nxt         = dff[`L1_PAGE__DAC_SEL];  // dac register holds the dac sel for future use.
                                state_nxt       = FETCH_L2_DESC_0;
                                state_nxt       = FETCH_L2_DESC_0;
 
 
                                tsk_prpr_wb_rd({dff[`L1_PAGE__PTBR],
                                tsk_prpr_wb_rd({dff[`L1_PAGE__PTBR],
                                                  i_address[`VA__L2_TABLE_INDEX], 2'd0});
                                                  i_address[`VA__L2_TABLE_INDEX], 2'd0});
 
 
                                $display($time, " - %m :: L1 received Page ID.");
 
 
 
                                `ifdef TLB_DEBUG
 
                                        $stop;
 
                                `endif
 
                        end
                        end
 
 
                        default: /* Generate section translation fault. Fault Class II */
                        default: /* Generate section translation fault. Fault Class II */
                        begin
                        begin
                                o_fsr        = FSR_SECTION_TRANSLATION_FAULT;
                                o_fsr        = FSR_SECTION_TRANSLATION_FAULT;
                                o_fsr        = {dff[`L1_SECTION__DAC_SEL], o_fsr[3:0]};
                                o_fsr        = {dff[`L1_SECTION__DAC_SEL], o_fsr[3:0]};
                                o_far        = i_address;
                                o_far        = i_address;
                                o_fault      = 1'd1;
                                o_fault      = 1'd1;
                                o_busy       = 1'd0;
                                o_busy       = 1'd0;
                                state_nxt    = IDLE;
                                state_nxt    = IDLE;
 
 
                                $display($time, " - %m :: FSR section translation fault!");
 
 
 
                                `ifdef TLB_DEBUG
 
                                        $stop;
 
                                `endif
 
                        end
                        end
 
 
                        endcase
                        endcase
                end
                end
                else tsk_hold_wb_access;
                else tsk_hold_wb_access;
Line 410... Line 355...
                else tsk_hold_wb_access;
                else tsk_hold_wb_access;
        end
        end
 
 
        REFRESH_CYCLE:
        REFRESH_CYCLE:
        begin
        begin
                $display($time, " - %m :: Entered refresh cycle. Moving to IDLE...");
 
 
 
                `ifdef TLB_DEBUG
 
                        $stop;
 
                `endif
 
 
 
                o_busy    = 1'd1;
                o_busy    = 1'd1;
                state_nxt = IDLE;
                state_nxt = IDLE;
        end
        end
 
 
        endcase
        endcase
Line 461... Line 400...
end
end
endtask
endtask
 
 
task tsk_prpr_wb_rd ( input [31:0] adr );
task tsk_prpr_wb_rd ( input [31:0] adr );
begin
begin
        $display($time, " - %m :: Reading from location %x", adr);
 
 
 
        `ifdef TLB_DEBUG
 
                $stop;
 
        `endif
 
 
 
        wb_stb_nxt      = 1'd1;
        wb_stb_nxt      = 1'd1;
        wb_cyc_nxt      = 1'd1;
        wb_cyc_nxt      = 1'd1;
        wb_adr_nxt      = adr;
        wb_adr_nxt      = adr;
        wb_sel_nxt[3:0] = 4'b1111;
        wb_sel_nxt[3:0] = 4'b1111;
end
end
endtask
endtask
 
 
// ----------------------------------------------------------------------------
 
 
 
// assertions_start
 
 
 
always @ (posedge i_mmu_en)
 
begin
 
        $display($time, " - %m :: MMU Enabled!");
 
end
 
 
 
always @ (negedge i_mmu_en)
 
begin
 
        $display($time, " - %m :: MMU Disabled!");
 
end
 
 
 
// assertions_end
 
 
 
endmodule // zap_tlb_fsm.v
endmodule // zap_tlb_fsm.v
 
 
`default_nettype wire
`default_nettype wire
 
 
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// ----------------------------------------------------------------------------
 
// END OF FILE
 
// ----------------------------------------------------------------------------
 
 
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