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[/] [zipcpu/] [trunk/] [bench/] [cpp/] [memsim.h] - Diff between revs 2 and 36

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Rev 2 Rev 36
Line 49... Line 49...
 
 
 
 
        MEMSIM(const unsigned int nwords);
        MEMSIM(const unsigned int nwords);
        ~MEMSIM(void);
        ~MEMSIM(void);
        void    load(const char *fname);
        void    load(const char *fname);
        void    apply(const uchar wb_cyc, const uchar wb_stb, const uchar wb_we,
        void    apply(const unsigned clk, const uchar wb_cyc, const uchar wb_stb,
 
                                const uchar wb_we,
                        const BUSW wb_addr, const BUSW wb_data,
                        const BUSW wb_addr, const BUSW wb_data,
                        uchar &o_ack, uchar &o_stall, BUSW &o_data);
                        uchar &o_ack, uchar &o_stall, BUSW &o_data);
        void    operator()(const uchar wb_cyc, const uchar wb_stb, const uchar wb_we,
        void    operator()(const unsigned clk, const uchar wb_cyc, const uchar wb_stb, const uchar wb_we,
                        const BUSW wb_addr, const BUSW wb_data,
                        const BUSW wb_addr, const BUSW wb_data,
                        uchar &o_ack, uchar &o_stall, BUSW &o_data) {
                        uchar &o_ack, uchar &o_stall, BUSW &o_data) {
                apply(wb_cyc, wb_stb, wb_we, wb_addr, wb_data, o_ack, o_stall, o_data);
                apply(clk, wb_cyc, wb_stb, wb_we, wb_addr, wb_data, o_ack, o_stall, o_data);
        }
        }
        BUSW &operator[](const BUSW addr) { return m_mem[addr&m_mask]; }
        BUSW &operator[](const BUSW addr) { return m_mem[addr&m_mask]; }
};
};
 
 
#endif
#endif

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