URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [bench/] [cpp/] [zippy_tb.cpp] - Diff between revs 2 and 4

Rev 2	Rev 4
Line 267...	Line 267...
`mvprintw(ln,61, "uPC : 0x%08x", m_core->v__DOT__thecpu__DOT__upc);`	`mvprintw(ln,61, "uPC : 0x%08x", m_core->v__DOT__thecpu__DOT__upc);`

`attroff(A_BOLD);`	`attroff(A_BOLD);`
`ln+=1;`	`ln+=1;`

`mvprintw(ln, 0, "PFPIPE: rda=%08x/%d, bas=%08x, off=%08x, nv=%08x",`	`mvprintw(ln, 0, "PFPIPE: rda=%08x/%d, bas=%08x, off=%08x, nv=%03x, ackw=%d",`
`m_core->v__DOT__thecpu__DOT__pf__DOT__r_addr,`	`m_core->v__DOT__thecpu__DOT__pf__DOT__r_addr,`
`m_core->v__DOT__thecpu__DOT__pf__DOT__r_cv,`	`m_core->v__DOT__thecpu__DOT__pf__DOT__r_cv,`
`m_core->v__DOT__thecpu__DOT__pf__DOT__r_cache_base,`	`m_core->v__DOT__thecpu__DOT__pf__DOT__r_cache_base,`
`m_core->v__DOT__thecpu__DOT__pf__DOT__r_cache_offset,`	`m_core->v__DOT__thecpu__DOT__pf__DOT__r_cache_offset,`
`m_core->v__DOT__thecpu__DOT__pf__DOT__r_nvalid);`	`m_core->v__DOT__thecpu__DOT__pf__DOT__r_nvalid,`
	`m_core->v__DOT__thecpu__DOT__pf__DOT__r_acks_waiting);`
`ln++;`	`ln++;`
`mvprintw(ln, 0, "PF BUS: %3s %3s %s @0x%08x[0x%08x] -> %s %s %08x",`	`mvprintw(ln, 0, "PF BUS: %3s %3s %s @0x%08x[0x%08x] -> %s %s %08x",`
`(m_core->v__DOT__thecpu__DOT__pf_cyc)?"CYC":" ",`	`(m_core->v__DOT__thecpu__DOT__pf_cyc)?"CYC":" ",`
`(m_core->v__DOT__thecpu__DOT__pf_stb)?"STB":" ",`	`(m_core->v__DOT__thecpu__DOT__pf_stb)?"STB":" ",`
`" ", // (m_core->v__DOT__thecpu__DOT__pf_we )?"WE":" ",`	`" ", // (m_core->v__DOT__thecpu__DOT__pf_we )?"WE":" ",`