| Line 35... |
Line 35... |
//
|
//
|
//
|
//
|
#include <signal.h>
|
#include <signal.h>
|
#include <time.h>
|
#include <time.h>
|
#include <unistd.h>
|
#include <unistd.h>
|
|
#include <poll.h>
|
|
|
#include <ctype.h>
|
#include <ctype.h>
|
#include <ncurses.h>
|
#include <ncurses.h>
|
|
|
#include "verilated.h"
|
#include "verilated.h"
|
| Line 69... |
Line 70... |
public:
|
public:
|
unsigned long m_mem_size;
|
unsigned long m_mem_size;
|
MEMSIM m_mem;
|
MEMSIM m_mem;
|
// QSPIFLASHSIM m_flash;
|
// QSPIFLASHSIM m_flash;
|
FILE *dbg_fp;
|
FILE *dbg_fp;
|
bool dbg_flag, bomb;
|
bool dbg_flag, bomb, m_show_user_timers;
|
int m_cursor;
|
int m_cursor;
|
|
|
ZIPPY_TB(void) : m_mem_size(1<<20), m_mem(m_mem_size) {
|
ZIPPY_TB(void) : m_mem_size(1<<20), m_mem(m_mem_size) {
|
if (true) {
|
if (false) {
|
dbg_fp = fopen("dbg.txt", "w");
|
dbg_fp = fopen("dbg.txt", "w");
|
dbg_flag = true;
|
dbg_flag = true;
|
} else {
|
} else {
|
dbg_fp = NULL;
|
dbg_fp = NULL;
|
dbg_flag = false;
|
dbg_flag = false;
|
}
|
}
|
bomb = false;
|
bomb = false;
|
m_cursor = 0;
|
m_cursor = 0;
|
|
m_show_user_timers = false;
|
}
|
}
|
|
|
void reset(void) {
|
void reset(void) {
|
// m_flash.debug(false);
|
// m_flash.debug(false);
|
TESTB<Vzipsystem>::reset();
|
TESTB<Vzipsystem>::reset();
|
| Line 215... |
Line 217... |
showval(ln, 0, "TMRA", m_core->v__DOT__timer_a__DOT__r_value, (m_cursor==4));
|
showval(ln, 0, "TMRA", m_core->v__DOT__timer_a__DOT__r_value, (m_cursor==4));
|
showval(ln,20, "TMRB", m_core->v__DOT__timer_b__DOT__r_value, (m_cursor==5));
|
showval(ln,20, "TMRB", m_core->v__DOT__timer_b__DOT__r_value, (m_cursor==5));
|
showval(ln,40, "TMRB", m_core->v__DOT__timer_c__DOT__r_value, (m_cursor==6));
|
showval(ln,40, "TMRB", m_core->v__DOT__timer_c__DOT__r_value, (m_cursor==6));
|
showval(ln,60, "JIF ", m_core->v__DOT__jiffies__DOT__r_counter, (m_cursor==7));
|
showval(ln,60, "JIF ", m_core->v__DOT__jiffies__DOT__r_counter, (m_cursor==7));
|
|
|
|
|
|
if (!m_show_user_timers) {
|
|
ln++;
|
|
showval(ln, 0, "MTSK", m_core->v__DOT__mtc_data, (m_cursor==8));
|
|
showval(ln,20, "MOST", m_core->v__DOT__moc_data, (m_cursor==9));
|
|
showval(ln,40, "MPST", m_core->v__DOT__mpc_data, (m_cursor==10));
|
|
showval(ln,60, "MICT", m_core->v__DOT__mic_data, (m_cursor==11));
|
|
} else {
|
ln++;
|
ln++;
|
showval(ln, 0, "UTSK", m_core->v__DOT__utc_data, (m_cursor==8));
|
showval(ln, 0, "UTSK", m_core->v__DOT__utc_data, (m_cursor==8));
|
showval(ln,20, "UOST", m_core->v__DOT__uoc_data, (m_cursor==9));
|
showval(ln,20, "UOST", m_core->v__DOT__uoc_data, (m_cursor==9));
|
showval(ln,40, "UPST", m_core->v__DOT__upc_data, (m_cursor==10));
|
showval(ln,40, "UPST", m_core->v__DOT__upc_data, (m_cursor==10));
|
showval(ln,60, "UICT", m_core->v__DOT__uic_data, (m_cursor==11));
|
showval(ln,60, "UICT", m_core->v__DOT__uic_data, (m_cursor==11));
|
|
}
|
|
|
ln++;
|
ln++;
|
mvprintw(ln, 40, "%s %s",
|
mvprintw(ln, 40, "%s %s",
|
(m_core->v__DOT__cpu_halt)? "CPU-HALT": " ",
|
(m_core->v__DOT__cpu_halt)? "CPU-HALT": " ",
|
(m_core->v__DOT__cpu_reset)?"CPU-RESET":" "); ln++;
|
(m_core->v__DOT__cpu_reset)?"CPU-RESET":" "); ln++;
|
| Line 290... |
Line 301... |
showreg(ln,40, "uR10", 26, (m_cursor==38));
|
showreg(ln,40, "uR10", 26, (m_cursor==38));
|
showreg(ln,60, "uR11", 27, (m_cursor==39)); ln++;
|
showreg(ln,60, "uR11", 27, (m_cursor==39)); ln++;
|
|
|
showreg(ln, 0, "uR12", 28, (m_cursor==40));
|
showreg(ln, 0, "uR12", 28, (m_cursor==40));
|
showreg(ln,20, "uSP ", 29, (m_cursor==41));
|
showreg(ln,20, "uSP ", 29, (m_cursor==41));
|
mvprintw(ln,40, "uCC :%s%s%s%s%s%s%s%s",
|
mvprintw(ln,40, "%cuCC :%s%s%s%s%s%s%s%s",
|
|
(m_cursor == 42)?'>':' ',
|
(m_core->v__DOT__thecpu__DOT__trap)?"TRP":" ",
|
(m_core->v__DOT__thecpu__DOT__trap)?"TRP":" ",
|
(m_core->v__DOT__thecpu__DOT__step)?"STP":" ",
|
(m_core->v__DOT__thecpu__DOT__step)?"STP":" ",
|
(m_core->v__DOT__thecpu__DOT__sleep)?"SLP":" ",
|
(m_core->v__DOT__thecpu__DOT__sleep)?"SLP":" ",
|
(m_core->v__DOT__thecpu__DOT__gie)?"GIE":" ",
|
(m_core->v__DOT__thecpu__DOT__gie)?"GIE":" ",
|
(m_core->v__DOT__thecpu__DOT__flags&8)?"V":" ",
|
(m_core->v__DOT__thecpu__DOT__flags&8)?"V":" ",
|
| Line 364... |
Line 376... |
(m_core->i_wb_stall)?"STL":" ",
|
(m_core->i_wb_stall)?"STL":" ",
|
(m_core->i_wb_data)); ln+=2;
|
(m_core->i_wb_data)); ln+=2;
|
#ifdef OPT_PIPELINED_BUS_ACCESS
|
#ifdef OPT_PIPELINED_BUS_ACCESS
|
mvprintw(ln-1, 0, "Mem CE: %d = %d%d%d%d%d, stall: %d = %d%d(%d|%d%d|..)",
|
mvprintw(ln-1, 0, "Mem CE: %d = %d%d%d%d%d, stall: %d = %d%d(%d|%d%d|..)",
|
(m_core->v__DOT__thecpu__DOT__mem_ce),
|
(m_core->v__DOT__thecpu__DOT__mem_ce),
|
(m_core->v__DOT__thecpu__DOT__master_ce),
|
(m_core->v__DOT__thecpu__DOT__master_ce), //1
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem), //0
|
(!m_core->v__DOT__thecpu__DOT__clear_pipeline),
|
(!m_core->v__DOT__thecpu__DOT__clear_pipeline), //1
|
(m_core->v__DOT__thecpu__DOT__set_cond),
|
(m_core->v__DOT__thecpu__DOT__set_cond), //1
|
(!m_core->v__DOT__thecpu__DOT__mem_stalled),
|
(!m_core->v__DOT__thecpu__DOT__mem_stalled), //1
|
|
|
(m_core->v__DOT__thecpu__DOT__mem_stalled),
|
(m_core->v__DOT__thecpu__DOT__mem_stalled),
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
|
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
|
(m_core->v__DOT__thecpu__DOT__master_ce),
|
(m_core->v__DOT__thecpu__DOT__master_ce),
|
(mem_pipe_stalled()),
|
(mem_pipe_stalled()),
|
| Line 393... |
Line 405... |
mvprintw(4,4,"r_dcdI = 0x%06x, r_opI = 0x%06x",
|
mvprintw(4,4,"r_dcdI = 0x%06x, r_opI = 0x%06x",
|
(m_core->v__DOT__thecpu__DOT__r_dcdI),
|
(m_core->v__DOT__thecpu__DOT__r_dcdI),
|
(m_core->v__DOT__thecpu__DOT__r_opI));
|
(m_core->v__DOT__thecpu__DOT__r_opI));
|
#endif
|
#endif
|
mvprintw(4,42,"0x%08x", m_core->v__DOT__thecpu__DOT__instruction);
|
mvprintw(4,42,"0x%08x", m_core->v__DOT__thecpu__DOT__instruction);
|
|
printw(" A:%c%c B:%c",
|
|
(m_core->v__DOT__thecpu__DOT__opA_alu)?'A':'-',
|
|
(m_core->v__DOT__thecpu__DOT__opA_mem)?'M':'-',
|
|
(m_core->v__DOT__thecpu__DOT__opB_alu)?'A':'-');
|
|
|
|
|
showins(ln, "I ",
|
showins(ln, "I ",
|
!m_core->v__DOT__thecpu__DOT__dcd_stalled,
|
!m_core->v__DOT__thecpu__DOT__dcd_stalled,
|
m_core->v__DOT__thecpu__DOT__pf_valid,
|
m_core->v__DOT__thecpu__DOT__pf_valid,
|
| Line 483... |
Line 499... |
(m_core->v__DOT__thecpu__DOT__mem_stalled)?"PIPE":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_stalled)?"PIPE":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_valid)?"V":" ",
|
(m_core->v__DOT__thecpu__DOT__mem_valid)?"V":" ",
|
zop_regstr[(m_core->v__DOT__thecpu__DOT__mem_wreg&0x1f)^0x10]);
|
zop_regstr[(m_core->v__DOT__thecpu__DOT__mem_wreg&0x1f)^0x10]);
|
}
|
}
|
|
|
|
void show_user_timers(bool v) {
|
|
m_show_user_timers = v;
|
|
}
|
|
|
unsigned int cmd_read(unsigned int a) {
|
unsigned int cmd_read(unsigned int a) {
|
if (dbg_fp) {
|
if (dbg_fp) {
|
dbg_flag= true;
|
dbg_flag= true;
|
fprintf(dbg_fp, "CMD-READ(%d)\n", a);
|
fprintf(dbg_fp, "CMD-READ(%d)\n", a);
|
}
|
}
|
| Line 553... |
Line 573... |
showval(ln,20, "TMRB", cmd_read(32+ 5), (m_cursor==5));
|
showval(ln,20, "TMRB", cmd_read(32+ 5), (m_cursor==5));
|
showval(ln,40, "TMRC", cmd_read(32+ 6), (m_cursor==6));
|
showval(ln,40, "TMRC", cmd_read(32+ 6), (m_cursor==6));
|
showval(ln,60, "JIF ", cmd_read(32+ 7), (m_cursor==7));
|
showval(ln,60, "JIF ", cmd_read(32+ 7), (m_cursor==7));
|
|
|
ln++;
|
ln++;
|
|
if (!m_show_user_timers) {
|
|
showval(ln, 0, "UTSK", cmd_read(32+8), (m_cursor==8));
|
|
showval(ln,20, "UMST", cmd_read(32+9), (m_cursor==9));
|
|
showval(ln,40, "UPST", cmd_read(32+10), (m_cursor==10));
|
|
showval(ln,60, "UICT", cmd_read(32+11), (m_cursor==11));
|
|
} else {
|
showval(ln, 0, "UTSK", cmd_read(32+12), (m_cursor==8));
|
showval(ln, 0, "UTSK", cmd_read(32+12), (m_cursor==8));
|
showval(ln,20, "UMST", cmd_read(32+13), (m_cursor==9));
|
showval(ln,20, "UMST", cmd_read(32+13), (m_cursor==9));
|
showval(ln,40, "UPST", cmd_read(32+14), (m_cursor==10));
|
showval(ln,40, "UPST", cmd_read(32+14), (m_cursor==10));
|
showval(ln,60, "UICT", cmd_read(32+15), (m_cursor==11));
|
showval(ln,60, "UICT", cmd_read(32+15), (m_cursor==11));
|
|
}
|
|
|
ln++;
|
ln++;
|
ln++;
|
ln++;
|
unsigned int cc = cmd_read(14);
|
unsigned int cc = cmd_read(14);
|
if (dbg_fp) fprintf(dbg_fp, "CC = %08x, gie = %d\n", cc,
|
if (dbg_fp) fprintf(dbg_fp, "CC = %08x, gie = %d\n", cc,
|
| Line 801... |
Line 828... |
m_tickcount++;
|
m_tickcount++;
|
} else {
|
} else {
|
m_mem(1, m_core->o_wb_cyc, m_core->o_wb_stb, m_core->o_wb_we,
|
m_mem(1, m_core->o_wb_cyc, m_core->o_wb_stb, m_core->o_wb_we,
|
m_core->o_wb_addr & ((1<<20)-1), m_core->o_wb_data,
|
m_core->o_wb_addr & ((1<<20)-1), m_core->o_wb_data,
|
m_core->i_wb_ack, m_core->i_wb_stall,m_core->i_wb_data);
|
m_core->i_wb_ack, m_core->i_wb_stall,m_core->i_wb_data);
|
|
if ((m_core->o_wb_cyc)&&(m_core->o_wb_stb)
|
|
&&((m_core->o_wb_addr & (~((1<<20)-1))) != 0x100000))
|
|
m_core->i_wb_err = 1;
|
|
else
|
|
m_core->i_wb_err = 0;
|
TESTB<Vzipsystem>::tick();
|
TESTB<Vzipsystem>::tick();
|
}
|
}
|
if ((dbg_fp)&&(gie != m_core->v__DOT__thecpu__DOT__gie)) {
|
if ((dbg_fp)&&(gie != m_core->v__DOT__thecpu__DOT__gie)) {
|
fprintf(dbg_fp, "SWITCH FROM %s to %s: sPC = 0x%08x uPC = 0x%08x pf_pc = 0x%08x\n",
|
fprintf(dbg_fp, "SWITCH FROM %s to %s: sPC = 0x%08x uPC = 0x%08x pf_pc = 0x%08x\n",
|
(gie)?"User":"Supervisor",
|
(gie)?"User":"Supervisor",
|
| Line 866... |
Line 898... |
// return m_core->v__DOT__thecpu__DOT__mem_pipe_stalled;
|
// return m_core->v__DOT__thecpu__DOT__mem_pipe_stalled;
|
}
|
}
|
#endif
|
#endif
|
|
|
bool test_failure(void) {
|
bool test_failure(void) {
|
return ((m_core->v__DOT__thecpu__DOT__alu_pc_valid)
|
if (m_core->v__DOT__thecpu__DOT__sleep)
|
&&(m_mem[alu_pc()] == 0x2f0f7fff)
|
return 0;
|
&&(!m_core->v__DOT__thecpu__DOT__clear_pipeline));
|
else if (m_core->v__DOT__thecpu__DOT__gie)
|
|
return (m_mem[m_core->v__DOT__thecpu__DOT__upc] == 0x2f0f7fff);
|
|
else
|
|
return (m_mem[m_core->v__DOT__thecpu__DOT__ipc] == 0x2f0f7fff);
|
|
/*
|
|
return ((m_core->v__DOT__thecpu__DOT__alu_pc_valid)
|
|
&&(m_mem[alu_pc()] == 0x2f0f7fff)
|
|
&&(!m_core->v__DOT__thecpu__DOT__clear_pipeline));
|
|
*/
|
}
|
}
|
|
|
void wb_write(unsigned a, unsigned int v) {
|
void wb_write(unsigned a, unsigned int v) {
|
int errcount = 0;
|
int errcount = 0;
|
mvprintw(0,35, "%40s", "");
|
mvprintw(0,35, "%40s", "");
|
| Line 1089... |
Line 1129... |
printf("\t\t\'s\'\tStep the CPU using the external stepping command\n");
|
printf("\t\t\'s\'\tStep the CPU using the external stepping command\n");
|
printf("\t\t\tThis may consume more than one tick.\n");
|
printf("\t\t\tThis may consume more than one tick.\n");
|
printf("\t\t\'t\'\tClock a single tick through the system.\n");
|
printf("\t\t\'t\'\tClock a single tick through the system.\n");
|
}
|
}
|
|
|
|
bool signalled = false;
|
|
|
|
void sigint(int v) {
|
|
signalled = true;
|
|
}
|
|
|
int main(int argc, char **argv) {
|
int main(int argc, char **argv) {
|
Verilated::commandArgs(argc, argv);
|
Verilated::commandArgs(argc, argv);
|
ZIPPY_TB *tb = new ZIPPY_TB();
|
ZIPPY_TB *tb = new ZIPPY_TB();
|
bool autorun = false, exit_on_done = false, autostep=false;
|
bool autorun = false, exit_on_done = false, autostep=false;
|
|
|
// mem[0x00000] = 0xbe000010; // Halt instruction
|
// mem[0x00000] = 0xbe000010; // Halt instruction
|
unsigned int mptr = 0;
|
unsigned int mptr = 0;
|
|
|
|
signal(SIGINT, sigint);
|
|
|
if (argc <= 1) {
|
if (argc <= 1) {
|
usage();
|
usage();
|
exit(-1);
|
exit(-1);
|
} else {
|
} else {
|
for(int argn=1; argn<argc; argn++) {
|
for(int argn=1; argn<argc; argn++) {
|
| Line 1157... |
Line 1205... |
tb->m_core->v__DOT__thecpu__DOT__upc,
|
tb->m_core->v__DOT__thecpu__DOT__upc,
|
tb->m_core->v__DOT__thecpu__DOT__alu_pc);
|
tb->m_core->v__DOT__thecpu__DOT__alu_pc);
|
*/
|
*/
|
|
|
done = (tb->test_success())||(tb->test_failure());
|
done = (tb->test_success())||(tb->test_failure());
|
|
done = done || signalled;
|
}
|
}
|
} else if (autostep) {
|
} else if (autostep) {
|
bool done = false;
|
bool done = false;
|
|
|
printf("Running in non-interactive mode, via step commands\n");
|
printf("Running in non-interactive mode, via step commands\n");
|
tb->wb_write(CMD_REG, CMD_HALT|CMD_RESET);
|
tb->wb_write(CMD_REG, CMD_HALT|CMD_RESET);
|
while(!done) {
|
while(!done) {
|
tb->wb_write(CMD_REG, CMD_STEP);
|
tb->wb_write(CMD_REG, CMD_STEP);
|
done = (tb->test_success())||(tb->test_failure());
|
done = (tb->test_success())||(tb->test_failure());
|
|
done = done || signalled;
|
}
|
}
|
} else { // Interactive
|
} else { // Interactive
|
initscr();
|
initscr();
|
raw();
|
raw();
|
noecho();
|
noecho();
|
| Line 1180... |
Line 1230... |
tb->tick();
|
tb->tick();
|
tb->m_core->v__DOT__cmd_halt = 0;
|
tb->m_core->v__DOT__cmd_halt = 0;
|
|
|
int chv = 'q';
|
int chv = 'q';
|
|
|
bool done = false, halted = true, manual = true;
|
bool done = false, halted = true, manual = true,
|
|
high_speed = false;
|
|
|
halfdelay(1);
|
halfdelay(1);
|
// tb->wb_write(CMD_REG, CMD_HALT | CMD_RESET);
|
// tb->wb_write(CMD_REG, CMD_HALT | CMD_RESET);
|
// while((tb->wb_read(CMD_REG) & (CMD_HALT|CMD_STALL))==(CMD_HALT|CMD_STALL))
|
// while((tb->wb_read(CMD_REG) & (CMD_HALT|CMD_STALL))==(CMD_HALT|CMD_STALL))
|
// tb->show_state();
|
// tb->show_state();
|
|
|
while(!done) {
|
while(!done) {
|
|
if ((high_speed)&&(!manual)&&(!halted)) {
|
|
struct pollfd fds[1];
|
|
fds[0].fd = STDIN_FILENO;
|
|
fds[0].events = POLLIN;
|
|
if (poll(fds, 1, 0) > 0)
|
|
chv = getch();
|
|
else
|
|
chv = ERR;
|
|
} else {
|
chv = getch();
|
chv = getch();
|
|
}
|
switch(chv) {
|
switch(chv) {
|
case 'h': case 'H':
|
case 'h': case 'H':
|
tb->wb_write(CMD_REG, CMD_HALT);
|
tb->wb_write(CMD_REG, CMD_HALT);
|
if (!halted)
|
if (!halted)
|
erase();
|
erase();
|
halted = true;
|
halted = true;
|
break;
|
break;
|
case 'g': case 'G':
|
case 'G':
|
|
high_speed = true;
|
|
case 'g':
|
tb->wb_write(CMD_REG, 0);
|
tb->wb_write(CMD_REG, 0);
|
if (halted)
|
if (halted)
|
erase();
|
erase();
|
halted = false;
|
halted = false;
|
manual = false;
|
manual = false;
|
break;
|
break;
|
|
case 'm':
|
|
tb->show_user_timers(false);
|
|
break;
|
case 'q': case 'Q':
|
case 'q': case 'Q':
|
done = true;
|
done = true;
|
break;
|
break;
|
case 'r': case 'R':
|
case 'r': case 'R':
|
if (manual)
|
if (manual)
|
| Line 1220... |
Line 1286... |
if (!halted)
|
if (!halted)
|
erase();
|
erase();
|
tb->wb_write(CMD_REG, CMD_STEP);
|
tb->wb_write(CMD_REG, CMD_STEP);
|
manual = false;
|
manual = false;
|
halted = true;
|
halted = true;
|
|
high_speed = false;
|
break;
|
break;
|
case 'S':
|
case 'S':
|
if ((!manual)||(halted))
|
if ((!manual)||(halted))
|
erase();
|
erase();
|
manual = true;
|
manual = true;
|
halted = true;
|
halted = true;
|
|
high_speed = false;
|
tb->m_core->v__DOT__cmd_halt = 0;
|
tb->m_core->v__DOT__cmd_halt = 0;
|
tb->m_core->v__DOT__cmd_step = 1;
|
tb->m_core->v__DOT__cmd_step = 1;
|
tb->eval();
|
tb->eval();
|
tb->tick();
|
tb->tick();
|
break;
|
break;
|
case 'T': //
|
case 'T': //
|
if ((!manual)||(halted))
|
if ((!manual)||(halted))
|
erase();
|
erase();
|
manual = true;
|
manual = true;
|
halted = true;
|
halted = true;
|
|
high_speed = false;
|
tb->m_core->v__DOT__cmd_halt = 1;
|
tb->m_core->v__DOT__cmd_halt = 1;
|
tb->m_core->v__DOT__cmd_step = 0;
|
tb->m_core->v__DOT__cmd_step = 0;
|
tb->eval();
|
tb->eval();
|
tb->tick();
|
tb->tick();
|
break;
|
break;
|
case 't':
|
case 't':
|
if ((!manual)||(halted))
|
if ((!manual)||(halted))
|
erase();
|
erase();
|
manual = true;
|
manual = true;
|
halted = false;
|
halted = false;
|
|
high_speed = false;
|
// tb->m_core->v__DOT__thecpu__DOT__step = 0;
|
// tb->m_core->v__DOT__thecpu__DOT__step = 0;
|
// tb->m_core->v__DOT__cmd_halt = 0;
|
// tb->m_core->v__DOT__cmd_halt = 0;
|
// tb->m_core->v__DOT__cmd_step = 0;
|
// tb->m_core->v__DOT__cmd_step = 0;
|
tb->tick();
|
tb->tick();
|
break;
|
break;
|
|
case 'u':
|
|
tb->show_user_timers(true);
|
|
break;
|
case KEY_IC: case KEY_ENTER: case KEY_RETURN:
|
case KEY_IC: case KEY_ENTER: case KEY_RETURN:
|
get_value(tb);
|
get_value(tb);
|
break;
|
break;
|
case KEY_UP: tb->cursor_up(); break;
|
case KEY_UP: tb->cursor_up(); break;
|
case KEY_DOWN: tb->cursor_down(); break;
|
case KEY_DOWN: tb->cursor_down(); break;
|
| Line 1276... |
Line 1349... |
} else
|
} else
|
tb->show_state();
|
tb->show_state();
|
|
|
if (tb->m_core->i_rst)
|
if (tb->m_core->i_rst)
|
done =true;
|
done =true;
|
if (tb->bomb)
|
if ((tb->bomb)||(signalled))
|
done = true;
|
done = true;
|
|
|
if (exit_on_done) {
|
if (exit_on_done) {
|
if (tb->test_success())
|
if (tb->test_success())
|
done = true;
|
done = true;
|
| Line 1300... |
Line 1373... |
|
|
if (tb->test_success())
|
if (tb->test_success())
|
break;
|
break;
|
else if (tb->test_failure())
|
else if (tb->test_failure())
|
break;
|
break;
|
|
else if (signalled)
|
|
break;
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
|
|
|
printf("\n");
|
printf("Clocks used : %08x\n", tb->m_core->v__DOT__mtc_data);
|
printf("Clocks used : %08x\n", tb->m_core->v__DOT__mtc_data);
|
printf("Instructions Issued : %08x\n", tb->m_core->v__DOT__mic_data);
|
printf("Instructions Issued : %08x\n", tb->m_core->v__DOT__mic_data);
|
|
printf("Tick Count : %08lx\n", tb->m_tickcount);
|
if (tb->m_core->v__DOT__mtc_data != 0)
|
if (tb->m_core->v__DOT__mtc_data != 0)
|
printf("Instructions / Clock: %.2f\n",
|
printf("Instructions / Clock: %.2f\n",
|
(double)tb->m_core->v__DOT__mic_data
|
(double)tb->m_core->v__DOT__mic_data
|
/ (double)tb->m_core->v__DOT__mtc_data);
|
/ (double)tb->m_core->v__DOT__mtc_data);
|
|
|
| Line 1322... |
Line 1399... |
} else if (tb->test_failure()) {
|
} else if (tb->test_failure()) {
|
rcode = -2;
|
rcode = -2;
|
printf("TEST FAILED!\n");
|
printf("TEST FAILED!\n");
|
} else
|
} else
|
printf("User quit\n");
|
printf("User quit\n");
|
|
delete tb;
|
exit(rcode);
|
exit(rcode);
|
}
|
}
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|
