| Line 832... |
Line 832... |
tb->m_mem[mptr++] = zp.op_bv(1); // 4: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_bv(1); // 4: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
// Overflow set from subtraction
|
// Overflow set from subtraction
|
tb->m_mem[mptr++] = zp.op_ldi(0x0400,zp.ZIP_R11); // 6: LDI $4,R11
|
tb->m_mem[mptr++] = zp.op_ldi(0x0400,zp.ZIP_R11); // 6: LDI $4,R11
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0); // 7: LDI $1,R0
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0); // 7: LDI $1,R0
|
tb->m_mem[mptr++] = 0x5000001f; // 8: ROL $31,R0
|
tb->m_mem[mptr++] = zp.op_rol(31,zp.ZIP_R0); // 8: ROL $31,R0
|
tb->m_mem[mptr++] = zp.op_sub(1,zp.ZIP_R0); // Should set ovfl
|
tb->m_mem[mptr++] = zp.op_sub(1,zp.ZIP_R0); // Should set ovfl
|
tb->m_mem[mptr++] = zp.op_bv(1); // A: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_bv(1); // A: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
// Overflow set from LSR
|
// Overflow set from LSR
|
tb->m_mem[mptr++] = zp.op_ldi(0x0500,zp.ZIP_R11); // C: LDI $5,R11
|
tb->m_mem[mptr++] = zp.op_ldi(0x0500,zp.ZIP_R11); // C: LDI $5,R11
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0); // D: LDI $1,R0
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0);
|
tb->m_mem[mptr++] = 0x5000001f; // E: ROL $31,R0
|
tb->m_mem[mptr++] = zp.op_rol(31,zp.ZIP_R0);
|
tb->m_mem[mptr++] = zp.op_lsr(1,zp.ZIP_R0); // F: LSR $1,R0
|
tb->m_mem[mptr++] = zp.op_lsr(1,zp.ZIP_R0);
|
tb->m_mem[mptr++] = zp.op_bv(1); // A: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_bv(1);
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
// Overflow set from LSL
|
// Overflow set from LSL
|
tb->m_mem[mptr++] = zp.op_ldi(0x0600,zp.ZIP_R11); // C: LDI $6,R11
|
tb->m_mem[mptr++] = zp.op_ldi(0x0600,zp.ZIP_R11);
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0); // D: LDI $1,R0
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0);
|
tb->m_mem[mptr++] = 0x5000001e; // E: ROL $30,R0
|
tb->m_mem[mptr++] = zp.op_rol(30,zp.ZIP_R0);
|
tb->m_mem[mptr++] = zp.op_lsl(1,zp.ZIP_R0); // F: LSR $1,R0
|
tb->m_mem[mptr++] = zp.op_lsl(1,zp.ZIP_R0);
|
tb->m_mem[mptr++] = zp.op_bv(1); // A: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_bv(1);
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
// Overflow set from LSL, negative to positive
|
// Overflow set from LSL, negative to positive
|
tb->m_mem[mptr++] = zp.op_ldi(0x0700,zp.ZIP_R11); // C: LDI $7,R11
|
tb->m_mem[mptr++] = zp.op_ldi(0x0700,zp.ZIP_R11);
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0); // D: LDI $1,R0
|
tb->m_mem[mptr++] = zp.op_ldi(1,zp.ZIP_R0);
|
tb->m_mem[mptr++] = 0x5000001f; // E: ROL $30,R0
|
tb->m_mem[mptr++] = zp.op_rol(31,zp.ZIP_R0);
|
tb->m_mem[mptr++] = zp.op_lsl(1,zp.ZIP_R0); // F: LSR $1,R0
|
tb->m_mem[mptr++] = zp.op_lsl(1,zp.ZIP_R0);
|
tb->m_mem[mptr++] = zp.op_bv(1); // A: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_bv(1); // A: BV $1+PC
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
tb->m_mem[mptr++] = zp.op_mov(0,zp.ZIP_R11, zp.ZIP_CC); // FAIL! if here
|
|
|
|
|
// Test carry
|
// Test carry
|
