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[/] [zipcpu/] [trunk/] [rtl/] [core/] [cpuops.v] - Diff between revs 133 and 138

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Rev 133 Rev 138
Line 30... Line 30...
//              http://www.gnu.org/licenses/gpl.html
//              http://www.gnu.org/licenses/gpl.html
//
//
//
//
///////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////
//
//
// `define      LONG_MPY
`define LONG_MPY
module  cpuops(i_clk,i_rst, i_ce, i_valid, i_op, i_a, i_b, o_c, o_f, o_valid,
module  cpuops(i_clk,i_rst, i_ce, i_valid, i_op, i_a, i_b, o_c, o_f, o_valid,
                        o_illegal, o_busy);
                        o_illegal, o_busy);
        parameter       IMPLEMENT_MPY = 1;
        parameter       IMPLEMENT_MPY = 1;
        input           i_clk, i_rst, i_ce;
        input           i_clk, i_rst, i_ce;
        input           [3:0]    i_op;
        input           [3:0]    i_op;
Line 238... Line 238...
                        //      = 2^32(ah*bh)
                        //      = 2^32(ah*bh)
                        //              +2^16 (ah*bl+al*bh)
                        //              +2^16 (ah*bl+al*bh)
                        //              +(al*bl)
                        //              +(al*bl)
                        //              - 2^31 (2^16 bh+bl + 2^16 ah+al + 2^31)
                        //              - 2^31 (2^16 bh+bl + 2^16 ah+al + 2^31)
                        //
                        //
                        reg     [31:0]   pp_f, pp_o, pp_i, pp_l;
                        reg     [31:0]   pp_f, pp_l; // F and L from FOIL
 
                        reg     [32:0]   pp_oi; // The O and I from FOIL
                        reg     [32:0]   pp_s;
                        reg     [32:0]   pp_s;
                        always @(posedge i_clk)
                        always @(posedge i_clk)
                        begin
                        begin
                                pp_f<=r_mpy_a_input[31:16]*r_mpy_b_input[31:16];
                                pp_f<=r_mpy_a_input[31:16]*r_mpy_b_input[31:16];
                                pp_o<=r_mpy_a_input[31:16]*r_mpy_b_input[15: 0];
                                pp_oi<=r_mpy_a_input[31:16]*r_mpy_b_input[15: 0]
                                pp_i<=r_mpy_a_input[15: 0]*r_mpy_b_input[31:16];
                                        + r_mpy_a_input[15: 0]*r_mpy_b_input[31:16];
                                pp_l<=r_mpy_a_input[15: 0]*r_mpy_b_input[15: 0];
                                pp_l<=r_mpy_a_input[15: 0]*r_mpy_b_input[15: 0];
                                // And a special one for the sign
                                // And a special one for the sign
                                if (r_mpy_signed)
                                if (r_mpy_signed)
                                        pp_s <= 32'h8000_0000-(
                                        pp_s <= 32'h8000_0000-(
                                                r_mpy_a_input[31:0]
                                                r_mpy_a_input[31:0]
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                        always @(posedge i_clk)
                        always @(posedge i_clk)
                        begin
                        begin
                                r_mpy_result[15:0] <= pp_l[15:0];
                                r_mpy_result[15:0] <= pp_l[15:0];
                                r_mpy_result[63:16] <=
                                r_mpy_result[63:16] <=
                                        { 32'h00, pp_l[31:16] }
                                        { 32'h00, pp_l[31:16] }
                                        + { 16'h00, pp_o }
                                        + { 15'h00, pp_oi }
                                        + { 16'h00, pp_i }
 
                                        + { pp_s, 15'h00 }
                                        + { pp_s, 15'h00 }
                                        + { pp_f, 16'h00 };
                                        + { pp_f, 16'h00 };
                        end
                        end
                end // Fourth clock -- results are available for writeback.
                end // Fourth clock -- results are available for writeback.
`else
`else

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