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[/] [zipcpu/] [trunk/] [rtl/] [core/] [div.v] - Diff between revs 196 and 201

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///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
//
// Filename:    div.v
// Filename:    div.v
//
//
// Project:     Zip CPU -- a small, lightweight, RISC CPU soft core
// Project:     Zip CPU -- a small, lightweight, RISC CPU soft core
//
//
// Purpose:     Provide an Integer divide capability to the Zip CPU.
// Purpose:     Provide an Integer divide capability to the Zip CPU.  Provides
 
//              for both signed and unsigned divide.
 
//
 
// Steps:
 
//      i_rst   The DIVide unit starts in idle.  It can also be placed into an
 
//      idle by asserting the reset input.
 
//
 
//      i_wr    When i_rst is asserted, a divide begins.  On the next clock:
 
//
 
//        o_busy is set high so everyone else knows we are at work and they can
 
//              wait for us to complete.
 
//
 
//        pre_sign is set to true if we need to do a signed divide.  In this
 
//              case, we take a clock cycle to turn the divide into an unsigned
 
//              divide.
 
//
 
//        o_quotient, a place to store our result, is initialized to all zeros.
 
//
 
//        r_dividend is set to the numerator
 
//
 
//        r_divisor is set to 2^31 * the denominator (shift left by 31, or add
 
//              31 zeros to the right of the number.
 
//
 
//      pre_sign When true (clock cycle after i_wr), a clock cycle is used
 
//              to take the absolute value of the various arguments (r_dividend
 
//              and r_divisor), and to calculate what sign the output result
 
//              should be.
 
//
 
//
 
//      At this point, the divide is has started.  The divide works by walking
 
//      through every shift of the 
 
//
 
//                  DIVIDEND    over the
 
//              DIVISOR
 
//
 
//      If the DIVISOR is bigger than the dividend, the divisor is shifted
 
//      right, and nothing is done to the output quotient.
 
//
 
//                  DIVIDEND
 
//               DIVISOR
 
//
 
//      This repeats, until DIVISOR is less than or equal to the divident, as in
 
//
 
//              DIVIDEND
 
//              DIVISOR
 
//
 
//      At this point, if the DIVISOR is less than the dividend, the 
 
//      divisor is subtracted from the dividend, and the DIVISOR is again
 
//      shifted to the right.  Further, a '1' bit gets set in the output
 
//      quotient.
 
//
 
//      Once we've done this for 32 clocks, we've accumulated our answer into
 
//      the output quotient, and we can proceed to the next step.  If the
 
//      result will be signed, the next step negates the quotient, otherwise
 
//      it returns the result.
 
//
 
//      On the clock when we are done, o_busy is set to false, and o_valid set
 
//      to true.  (It is a violation of the ZipCPU internal protocol for both
 
//      busy and valid to ever be true on the same clock.  It is also a 
 
//      violation for busy to be false with valid true thereafter.)
//
//
//
//
// Creator:     Dan Gisselquist, Ph.D.
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//              Gisselquist Technology, LLC
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
//
// This program is free software (firmware): you can redistribute it and/or
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of  the GNU General Public License as published
// modify it under the terms of  the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
// your option) any later version.
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// This program is distributed in the hope that it will be useful, but WITHOUT
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
// for more details.
//
//
 
// You should have received a copy of the GNU General Public License along
 
// with this program.  (It's in the $(ROOT)/doc directory.  Run make with no
 
// target there if the PDF file isn't present.)  If not, see
 
// <http://www.gnu.org/licenses/> for a copy.
 
//
// License:     GPL, v3, as defined and found on www.gnu.org,
// License:     GPL, v3, as defined and found on www.gnu.org,
//              http://www.gnu.org/licenses/gpl.html
//              http://www.gnu.org/licenses/gpl.html
//
//
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
 
//
//
//
// `include "cpudefs.v"
// `include "cpudefs.v"
//
//
module  div(i_clk, i_rst, i_wr, i_signed, i_numerator, i_denominator,
module  div(i_clk, i_rst, i_wr, i_signed, i_numerator, i_denominator,
                o_busy, o_valid, o_err, o_quotient, o_flags);
                o_busy, o_valid, o_err, o_quotient, o_flags);

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