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// much area on the FPGA, this is an important option to use in trimming down
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// much area on the FPGA, this is an important option to use in trimming down
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// used area if necessary. Hence, it needs to be maintained for that purpose.
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// used area if necessary. Hence, it needs to be maintained for that purpose.
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// Be aware, though, it will drop your performance by a factor between 2x and
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// Be aware, though, it will drop your performance by a factor between 2x and
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// 3x.
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// 3x.
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//
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//
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// We can either pipeline our fetches, or issue one fetch at a time. Pipelined
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// fetches are more complicated and therefore use more FPGA resources, while
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// single fetches will cause the CPU to stall for about 5 stalls each
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// instruction cycle, effectively reducing the instruction count per clock to
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// about 0.2. However, the area cost may be worth it. Consider:
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//
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// Slice LUTs ZipSystem ZipCPU
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// Single Fetching 2521 1734
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// Pipelined fetching 2796 2046
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// (These numbers may be dated, but should still be representative ...)
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//
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// I recommend only defining this if you "need" to, if area is tight and
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// I recommend only defining this if you "need" to, if area is tight and
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// speed isn't as important. Otherwise, just leave this undefined.
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// speed isn't as important. Otherwise, just leave this undefined.
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//
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//
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// `define OPT_SINGLE_FETCH
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// `define OPT_SINGLE_FETCH
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//
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//
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