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URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [zasm/] [asmdata.cpp] - Diff between revs 13 and 26

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Rev 13 Rev 26
Line 66... Line 66...
                m_lines = nwlines;
                m_lines = nwlines;
        } else {
        } else {
                m_lines = new ASMLINE *[1];
                m_lines = new ASMLINE *[1];
                m_lines[m_nlines++] = line;
                m_lines[m_nlines++] = line;
        }
        }
 
 
 
        if (m_lineno > line->m_lineno)
 
                m_lineno = line->m_lineno;
};
};
 
 
bool    LLINE::isdefined(void) {
bool    LLINE::isdefined(void) {
        for(int i=0; i<m_nlines; i++)
        for(int i=0; i<m_nlines; i++)
                if (!m_lines[i]->isdefined())
                if (!m_lines[i]->isdefined())
Line 199... Line 202...
                                // printf("\t0x%08x -> %08x\n", i->m_pc+k,
                                // printf("\t0x%08x -> %08x\n", i->m_pc+k,
                                        // buf[0]);
                                        // buf[0]);
                                fwrite(buf, sizeof(ZIPI), 1, m_fp);
                                fwrite(buf, sizeof(ZIPI), 1, m_fp);
                        }
                        }
                } else {
                } else {
 
                        fprintf(stderr, "Line %d contains an undefined symbol: ", ln->m_lineno);
                        fprintf(stderr, "PC = 0x%08x isn\'t ready yet\n", i->m_pc);
                        fprintf(stderr, "PC = 0x%08x isn\'t ready yet\n", i->m_pc);
                        i->m_ln->dump(stderr);
                        i->m_ln->dump(stderr);
                        all_reduced = false;
                        all_reduced = false;
                }
                }
        } m_pc = tmp;
        } m_pc = tmp;
Line 290... Line 294...
                                yyerror("LDIHI needs a register result");
                                yyerror("LDIHI needs a register result");
                        if ((imm & (-1<<16))!=0)
                        if ((imm & (-1<<16))!=0)
                                yyerror("16-bit Immediate out of range");
                                yyerror("16-bit Immediate out of range");
                        in = zp.op_ldilo(m_cond, imm, m_opa);
                        in = zp.op_ldilo(m_cond, imm, m_opa);
                        break;
                        break;
                case OP_MPY:
                case OP_MPYU:
                        in = zp.op_mpy(m_cond, imm, m_opb, m_opa);
                        if ((m_opb == zp.ZIP_PC)||(m_opb == zp.ZIP_CC)
 
                                ||(m_opa == zp.ZIP_PC)||(m_opa == zp.ZIP_CC))
 
                                yyerror("MPYU does not support PC or CC register operands or results");
 
                        else if (m_opb == zp.ZIP_Rnone)
 
                                in = zp.op_mpyu(m_cond, imm, m_opa);
 
                        else
 
                                in = zp.op_mpyu(m_cond, imm, m_opb, m_opa);
 
                        break;
 
                case OP_MPYS:
 
                        if ((m_opb == zp.ZIP_PC)||(m_opb == zp.ZIP_CC)
 
                                ||(m_opa == zp.ZIP_PC)||(m_opa == zp.ZIP_CC))
 
                                yyerror("MPYS does not support PC or CC register operands or results");
 
                        else if (m_opb == zp.ZIP_Rnone)
 
                                in = zp.op_mpys(m_cond, imm, m_opa);
 
                        else
 
                                in = zp.op_mpys(m_cond, imm, m_opb, m_opa);
                        break;
                        break;
                case OP_ROL:
                case OP_ROL:
                        if (m_opa == zp.ZIP_Rnone)
                        if (m_opa == zp.ZIP_Rnone)
                                yyerror("ROL needs a register result");
                                yyerror("ROL needs a register result");
                        if (m_opb != zp.ZIP_Rnone)
                        if (m_opb != zp.ZIP_Rnone)
Line 344... Line 363...
                                if (m_opa == zp.ZIP_PC)
                                if (m_opa == zp.ZIP_PC)
                                        yyerror("Cannot LDI 32-bit addresses into PC register!");
                                        yyerror("Cannot LDI 32-bit addresses into PC register!");
                                LLINE *lln = new LLINE;
                                LLINE *lln = new LLINE;
                                lln->addline(new ILINE(zp.op_ldihi(m_cond, (imm>>16)&0x0ffff, m_opa)));
                                lln->addline(new ILINE(zp.op_ldihi(m_cond, (imm>>16)&0x0ffff, m_opa)));
                                lln->addline(new ILINE(zp.op_ldilo(m_cond, imm&0x0ffff, m_opa)));
                                lln->addline(new ILINE(zp.op_ldilo(m_cond, imm&0x0ffff, m_opa)));
 
                                lln->m_lineno = m_lineno;
                                return lln;
                                return lln;
                        } else
                        } else
                                in = zp.op_ldi(imm, m_opa);
                                in = zp.op_ldi(imm, m_opa);
                        break;
                        break;
                case OP_CLRF:
                case OP_CLRF:
                        in = zp.op_clrf(m_cond, m_opb);
                        in = zp.op_clrf(m_cond, m_opb);
                        break;
                        break;
                case OP_NOT:
                case OP_NOT:
                        in = zp.op_not(m_cond, m_opb);
                        in = zp.op_not(m_cond, m_opb);
                        break;
                        break;
 
                case OP_NEG:
 
                        if (m_cond != zp.ZIPC_ALWAYS) {
 
                                yyerror("Illegal operation: Conditional negate.  Negates cannot handle conditions");
 
                        } else {
 
                                LLINE *lln = new LLINE;
 
                                lln->addline(new ILINE(zp.op_not(m_opb)));
 
                                lln->addline(new ILINE(zp.op_add(1,m_opb)));
 
                                return lln;
 
                        }break;
                case OP_JMP:
                case OP_JMP:
                        if (!fitsin(imm, 16))
                        if (!fitsin(imm, 16))
                                yyerror("JMP: Immediate out of range");
                                yyerror("JMP: Immediate out of range");
                        else if (m_opb == zp.ZIP_Rnone) {
                        else if (m_opb == zp.ZIP_Rnone) {
                                if (m_cond != zp.ZIPC_ALWAYS)
                                if (m_cond != zp.ZIPC_ALWAYS)
Line 416... Line 445...
                case OP_NONE:
                case OP_NONE:
                default:        { char ebuf[256]; sprintf(ebuf, "Unrecognized OP-Code, %d, NONE = %d, CLR=%d", m_opcode, OP_NONE, OP_CLR);
                default:        { char ebuf[256]; sprintf(ebuf, "Unrecognized OP-Code, %d, NONE = %d, CLR=%d", m_opcode, OP_NONE, OP_CLR);
                                yyerror(ebuf);
                                yyerror(ebuf);
                                in = zp.op_noop(); break;
                                in = zp.op_noop(); break;
                                }
                                }
        } return new ILINE(in);
        }
 
        ILINE   *rs = new ILINE(in);
 
        rs->m_lineno = m_lineno;
}
}
 
 
int     TLINE::nlines(void)  {
int     TLINE::nlines(void)  {
        if ((m_opcode == OP_LDI)&&( (!(m_imm->isdefined()))
        if ((m_opcode == OP_LDI)&&( (!(m_imm->isdefined()))
                        || (m_cond != ZPARSER::ZIPC_ALWAYS)
                        || (m_cond != ZPARSER::ZIPC_ALWAYS)
Line 441... Line 472...
        }
        }
}
}
 
 
void    TLINE::dump(FILE *fp) {
void    TLINE::dump(FILE *fp) {
        if (m_state == 'V')
        if (m_state == 'V')
                fprintf(fp, "Void\n");
                fprintf(fp, "Void @%d\n", m_lineno);
        else if (m_state != 'T')
        else if (m_state != 'T')
                fprintf(fp, "TLINE state != T (== %c)\n", m_state);
                fprintf(fp, "TLINE state != T (== %c)\n", m_state);
        else {
        else {
                fprintf(fp, "TLINE\n");
                fprintf(fp, "TLINE @%d\n", m_lineno);
                switch(m_opcode) {
                switch(m_opcode) {
                case OP_CMP: fprintf(fp, "\tTLINE OP   = CMP\n");
                case OP_CMP: fprintf(fp, "\tTLINE OP   = CMP\n");
                        break;
                        break;
                case OP_TST: fprintf(fp, "\tTLINE OP   = TST\n");
                case OP_TST: fprintf(fp, "\tTLINE OP   = TST\n");
                        break;
                        break;
Line 457... Line 488...
                        break;
                        break;
                case OP_LDIHI: fprintf(fp, "\tTLINE OP   = LDIHI\n");
                case OP_LDIHI: fprintf(fp, "\tTLINE OP   = LDIHI\n");
                        break;
                        break;
                case OP_LDILO: fprintf(fp, "\tTLINE OP   = LDILO\n");
                case OP_LDILO: fprintf(fp, "\tTLINE OP   = LDILO\n");
                        break;
                        break;
                case OP_MPY: fprintf(fp, "\tTLINE OP   = MPY\n");
                case OP_MPYU: fprintf(fp,"\tTLINE OP   = MPYU\n");
 
                        break;
 
                case OP_MPYS: fprintf(fp,"\tTLINE OP   = MPYS\n");
                        break;
                        break;
                case OP_ROL: fprintf(fp, "\tTLINE OP   = ROL\n");
                case OP_ROL: fprintf(fp, "\tTLINE OP   = ROL\n");
                        break;
                        break;
                case OP_SUB: fprintf(fp, "\tTLINE OP   = SUB\n");
                case OP_SUB: fprintf(fp, "\tTLINE OP   = SUB\n");
                        break;
                        break;
Line 502... Line 535...
                case OP_BRV:
                case OP_BRV:
                        fprintf(fp, "\tTLINE OP   = BRA.C\n");
                        fprintf(fp, "\tTLINE OP   = BRA.C\n");
                        break;
                        break;
                case OP_CLR: fprintf(fp, "\tTLINE OP   = CLR\n");
                case OP_CLR: fprintf(fp, "\tTLINE OP   = CLR\n");
                        break;
                        break;
 
                case OP_NEG: fprintf(fp, "\tTLINE OP   = NEG\n");
 
                        break;
                case OP_TRAP: fprintf(fp, "\tTLINE OP   = TRAP\n");
                case OP_TRAP: fprintf(fp, "\tTLINE OP   = TRAP\n");
                        break;
                        break;
                case OP_HALT: fprintf(fp, "\tTLINE OP   = HALT\n");
                case OP_HALT: fprintf(fp, "\tTLINE OP   = HALT\n");
                        break;
                        break;
                case OP_RTU: fprintf(fp, "\tTLINE OP   = RTU\n");
                case OP_RTU: fprintf(fp, "\tTLINE OP   = RTU\n");

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