| Line 7... |
Line 7... |
// Purpose: Like asmdata.h, this contains necessary data structures for the
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// Purpose: Like asmdata.h, this contains necessary data structures for the
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// assembler. Specifically, in C/C++ fashion, this contains most
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// assembler. Specifically, in C/C++ fashion, this contains most
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// of the code for actually building such structures.
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// of the code for actually building such structures.
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Tecnology, LLC
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// Gisselquist Technology, LLC
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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// Copyright (C) 2015, Gisselquist Technology, LLC
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//
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//
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| Line 222... |
Line 222... |
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#define BLD_DUALOP(OP) \
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#define BLD_DUALOP(OP) \
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if (m_opa == zp.ZIP_Rnone) \
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if (m_opa == zp.ZIP_Rnone) \
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yyerror("Err: Dual Ops need a result register"); \
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yyerror("Err: Dual Ops need a result register"); \
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if (m_opb != zp.ZIP_Rnone) { \
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if (m_opb != zp.ZIP_Rnone) { \
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if(!fitsin(imm, 16)) \
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if(!fitsin(imm, 14)) \
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yyerror("16-bit: Immediate out of range"); \
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yyerror("14-bit: Immediate out of range"); \
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in = zp.OP(m_cond,imm,m_opb,m_opa); \
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in = zp.OP(m_cond,imm,m_opb,m_opa); \
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} else { \
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} else { \
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if(!fitsin(imm, 20)) \
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if(!fitsin(imm, 18)) \
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yyerror("20-bit: Immediate out of range"); \
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yyerror("18-bit: Immediate out of range"); \
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in = zp.OP(m_cond,imm,m_opa); \
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in = zp.OP(m_cond,imm,m_opa); \
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}
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}
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#define BLD_BRANCH(OP,CND) \
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#define BLD_BRANCH(OP,CND) \
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if (fitsin(offset, 16)) \
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if (fitsin(offset, 13)) \
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in = zp.OP(offset); \
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in = zp.OP(offset); \
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else if (fitsin(offset, 20)) \
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else if (fitsin(offset, 18)) \
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in = zp.op_add(zp.CND, offset, zp.ZIP_PC); \
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in = zp.op_add(zp.CND, offset, zp.ZIP_PC); \
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else { in = zp.OP(offset); yyerror("LONG JUMP NOT SUPPORTED"); }
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else { in = zp.OP(offset); yyerror("LONG JUMP NOT SUPPORTED"); }
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ASMLINE *TLINE::eval(void) {
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ASMLINE *TLINE::eval(void) {
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ZIPI in;
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ZIPI in;
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| Line 270... |
Line 270... |
case OP_MOV:
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case OP_MOV:
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if ((m_opa == zp.ZIP_Rnone)||(m_opb == zp.ZIP_Rnone)) {
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if ((m_opa == zp.ZIP_Rnone)||(m_opb == zp.ZIP_Rnone)) {
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yyerror("Moves can only occurr between registers");
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yyerror("Moves can only occurr between registers");
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fprintf(stderr, "m_opa = %d, m_opb = %d\n", m_opa, m_opb);
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fprintf(stderr, "m_opa = %d, m_opb = %d\n", m_opa, m_opb);
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fprintf(stderr, "m_imm = %d\n", imm);
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fprintf(stderr, "m_imm = %d\n", imm);
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} else if (!fitsin(imm, 16))
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} else if (!fitsin(imm, 13))
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yyerror("Immediate overflow on move");
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yyerror("Immediate overflow on move");
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in = zp.op_mov(m_cond, imm, m_opb, m_opa);
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in = zp.op_mov(m_cond, imm, m_opb, m_opa);
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break;
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break;
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case OP_LDIHI:
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case OP_LDIHI:
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if ((imm & (-1<<16))!=0)
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if ((imm & (-1<<16))!=0)
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| Line 356... |
Line 356... |
if (m_opb != zp.ZIP_Rnone)
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if (m_opb != zp.ZIP_Rnone)
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in = zp.op_sto(m_cond, m_opa, imm, m_opb);
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in = zp.op_sto(m_cond, m_opa, imm, m_opb);
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else
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else
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in = zp.op_sto(m_cond, m_opa, imm);
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in = zp.op_sto(m_cond, m_opa, imm);
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break;
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break;
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case OP_BREV:
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BLD_DUALOP(op_brev);
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break;
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case OP_POPC:
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BLD_DUALOP(op_popc);
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break;
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case OP_LDI:
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case OP_LDI:
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if ((!fitsin(imm, 24))||(m_cond != zp.ZIPC_ALWAYS)) {
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if ((!fitsin(imm, 23))||(m_cond != zp.ZIPC_ALWAYS)) {
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if (m_opa == zp.ZIP_PC)
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if (m_opa == zp.ZIP_PC)
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yyerror("Cannot LDI 32-bit addresses into PC register!");
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yyerror("Cannot LDI 32-bit addresses into PC register!");
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LLINE *lln = new LLINE;
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LLINE *lln = new LLINE;
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lln->addline(new ILINE(zp.op_ldihi(m_cond, (imm>>16)&0x0ffff, m_opa)));
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lln->addline(new ILINE(zp.op_ldihi(m_cond, (imm>>16)&0x0ffff, m_opa)));
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lln->addline(new ILINE(zp.op_ldilo(m_cond, imm&0x0ffff, m_opa)));
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lln->addline(new ILINE(zp.op_ldilo(m_cond, imm&0x0ffff, m_opa)));
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lln->m_lineno = m_lineno;
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lln->m_lineno = m_lineno;
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return lln;
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return lln;
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} else
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} else
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in = zp.op_ldi(imm, m_opa);
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in = zp.op_ldi(imm, m_opa);
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break;
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break;
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case OP_DIVU:
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BLD_DUALOP(op_divu);
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break;
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case OP_DIVS:
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BLD_DUALOP(op_divs);
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break;
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case OP_CLRF:
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case OP_CLRF:
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in = zp.op_clrf(m_cond, m_opb);
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in = zp.op_clrf(m_cond, m_opb);
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break;
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break;
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case OP_NOT:
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case OP_NOT:
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in = zp.op_not(m_cond, m_opb);
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in = zp.op_not(m_cond, m_opb);
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| Line 390... |
Line 402... |
}break;
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}break;
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case OP_JMP:
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case OP_JMP:
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if (m_opb == zp.ZIP_Rnone) {
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if (m_opb == zp.ZIP_Rnone) {
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if (m_cond != zp.ZIPC_ALWAYS)
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if (m_cond != zp.ZIPC_ALWAYS)
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yyerror("JMP: Conditions are not allowed for absolute jumps.");
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yyerror("JMP: Conditions are not allowed for absolute jumps.");
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imm &= (1<<24)-1;
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imm &= (1<<23)-1;
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if (!fitsin(imm, 24))
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if (!fitsin(imm, 23))
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yyerror("JMP: Absolute jump address out of range");
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yyerror("JMP: Absolute jump address out of range");
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in = zp.op_ldi(imm, zp.ZIP_PC);
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in = zp.op_ldi(imm, zp.ZIP_PC);
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} else if (fitsin(imm,16)) {
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} else if (fitsin(imm,13)) {
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in = zp.op_mov(m_cond, imm, m_opb, zp.ZIP_PC);
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in = zp.op_mov(m_cond, imm, m_opb, zp.ZIP_PC);
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} else if (fitsin(imm,20))
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} else if (fitsin(imm,18))
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in = zp.op_add(m_cond, imm, m_opb, zp.ZIP_PC);
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in = zp.op_add(m_cond, imm, m_opb, zp.ZIP_PC);
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else
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else
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yyerror("JMP: Immediate out of range");
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yyerror("JMP: Immediate out of range");
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break;
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break;
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case OP_BRA:
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case OP_BRA:
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| Line 436... |
Line 448... |
case OP_TRAP:
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case OP_TRAP:
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if((m_opb == zp.ZIP_Rnone)&&(m_cond == zp.ZIPC_ALWAYS))
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if((m_opb == zp.ZIP_Rnone)&&(m_cond == zp.ZIPC_ALWAYS))
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in = zp.op_ldi(imm, zp.ZIP_CC);
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in = zp.op_ldi(imm, zp.ZIP_CC);
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else if((m_opb == zp.ZIP_Rnone)&&((imm&0x0ffdf)==imm))
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else if((m_opb == zp.ZIP_Rnone)&&((imm&0x0ffdf)==imm))
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in = zp.op_ldilo(m_cond, imm & 0x0ffdf, zp.ZIP_CC);
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in = zp.op_ldilo(m_cond, imm & 0x0ffdf, zp.ZIP_CC);
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else if((m_opb != zp.ZIP_Rnone)&&(fitsin(imm, 16)))
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else if((m_opb != zp.ZIP_Rnone)&&(fitsin(imm, 13)))
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in = zp.op_mov(m_cond, imm, m_opb, zp.ZIP_CC);
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in = zp.op_mov(m_cond, imm, m_opb, zp.ZIP_CC);
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else {
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else {
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yyerror("Illegal trap!");
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yyerror("Illegal trap!");
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in = zp.op_trap(m_cond, 0);
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in = zp.op_trap(m_cond, 0);
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}
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}
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break;
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break;
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case OP_RETN: in = zp.op_retn(m_cond); break;
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case OP_RETN: // yywarn("RETN opcode is deprecated");
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in = zp.op_lod(m_cond, imm, m_opb, m_opa);
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in = zp.op_lod(m_cond, -1, zp.ZIP_SP, zp.ZIP_PC);
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break;
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case OP_HALT: in = zp.op_halt(m_cond); break;
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case OP_HALT: in = zp.op_halt(m_cond); break;
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case OP_RTU: in = zp.op_rtu(m_cond); break;
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case OP_RTU: in = zp.op_rtu(m_cond); break;
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case OP_BUSY: in = zp.op_busy(m_cond); break;
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case OP_BUSY: in = zp.op_busy(m_cond); break;
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case OP_BREAK: in = zp.op_break(); break;
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case OP_NOOP: in = zp.op_noop(); break;
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case OP_NOOP: in = zp.op_noop(); break;
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case OP_BREAK: in = zp.op_break(); break;
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case OP_LOCK: in = zp.op_lock(); break;
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// OP_LJMP:
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// OP_LJMP:
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case OP_NONE:
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case OP_NONE:
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default: { char ebuf[256]; sprintf(ebuf, "Unrecognized OP-Code, %d, NONE = %d, CLR=%d", m_opcode, OP_NONE, OP_CLR);
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default: { char ebuf[256]; sprintf(ebuf, "Unrecognized OP-Code, %d, NONE = %d, CLR=%d", m_opcode, OP_NONE, OP_CLR);
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yyerror(ebuf);
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yyerror(ebuf);
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in = zp.op_noop(); break;
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in = zp.op_noop(); break;
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| Line 463... |
Line 479... |
}
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}
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int TLINE::nlines(void) {
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int TLINE::nlines(void) {
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if ((m_opcode == OP_LDI)&&( (!(m_imm->isdefined()))
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if ((m_opcode == OP_LDI)&&( (!(m_imm->isdefined()))
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|| (m_cond != ZPARSER::ZIPC_ALWAYS)
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|| (m_cond != ZPARSER::ZIPC_ALWAYS)
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|| (!fitsin(m_imm->eval(), 24)) )) {
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|| (!fitsin(m_imm->eval(), 23)) )) {
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return 2;
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return 2;
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}
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}
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return 1;
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return 1;
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}
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}
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| Line 558... |
Line 574... |
case OP_BUSY: fprintf(fp, "\tTLINE OP = BUSY\n");
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case OP_BUSY: fprintf(fp, "\tTLINE OP = BUSY\n");
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break;
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break;
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case OP_BREAK: fprintf(fp, "\tTLINE OP = BREAK\n");
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case OP_BREAK: fprintf(fp, "\tTLINE OP = BREAK\n");
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break;
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break;
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case OP_NOOP: fprintf(fp, "\tTLINE OP = NOOP\n");
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case OP_NOOP: fprintf(fp, "\tTLINE OP = NOOP\n");
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case OP_LOCK: fprintf(fp, "\tTLINE OP = LOCK\n");
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break;
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break;
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// OP_LJMP:
|
// OP_LJMP:
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case OP_NONE:
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case OP_NONE:
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default:
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default:
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fprintf(fp, "\tTLINE OP = (Unrecognized, %d)\n", m_opcode);
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fprintf(fp, "\tTLINE OP = (Unrecognized, %d)\n", m_opcode);
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