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[/] [zipcpu/] [trunk/] [sw/] [zasm/] [test.S] - Diff between revs 55 and 60

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Line 84... Line 84...
#define TRAP_TEST
#define TRAP_TEST
#define MPY_TEST
#define MPY_TEST
#define PUSH_TEST
#define PUSH_TEST
#define PIPELINE_STACK_TEST
#define PIPELINE_STACK_TEST
#define MEM_PIPELINE_TEST
#define MEM_PIPELINE_TEST
 
#define CONDITIONAL_EXECUTION_TEST
#define NOWAIT_PIPELINE_TEST    // Were wait states btwn regs removed properly?
#define NOWAIT_PIPELINE_TEST    // Were wait states btwn regs removed properly?
test:
test:
#ifdef  DO_TEST_ASSEMBLER
#ifdef  DO_TEST_ASSEMBLER
; We start out by testing our assembler.  We give it some instructions, which
; We start out by testing our assembler.  We give it some instructions, which
; are then manually checked  by disassembling/dumping the result and making
; are then manually checked  by disassembling/dumping the result and making
Line 570... Line 571...
 
 
#ifdef  MEM_PIPELINE_TEST
#ifdef  MEM_PIPELINE_TEST
        JSR(mem_pipeline_test,R0)
        JSR(mem_pipeline_test,R0)
#endif  // MEM_PIPELINE_TEST
#endif  // MEM_PIPELINE_TEST
 
 
 
#ifdef  CONDITIONAL_EXECUTION_TEST
 
        JSR(conditional_execution_test,R0)
 
#endif  // CONDITIONAL_EXECUTION_TEST
 
 
#ifdef  NOWAIT_PIPELINE_TEST
#ifdef  NOWAIT_PIPELINE_TEST
        JSR(nowait_pipeline_test,R0)
        JSR(nowait_pipeline_test,R0)
#endif  // NOWAIT_PIPELINE_TEST
#endif  // NOWAIT_PIPELINE_TEST
 
 
// Return success / Test the trap interrupt
// Return success / Test the trap interrupt
Line 696... Line 701...
        LOD     2(SP),R1
        LOD     2(SP),R1
        ADD     4,SP
        ADD     4,SP
        RETN
        RETN
#endif
#endif
 
 
 
#ifdef  CONDITIONAL_EXECUTION_TEST
 
conditional_execution_test:
 
        ; R0 is corrupt on entry, no need to save it
 
        ; SUB   1,SP
 
        ; STO   R0,1(SP)
 
 
 
        CLRF    R0
 
        ADD.Z   1,R0
 
        TRAP.NZ R11
 
        CMP.Z   0,R0
 
        TRAP.Z  R11
 
 
 
        ; LOD   1(SP),R0
 
        ; ADD   1,SP
 
        ; ; Stall
 
        RETN
 
#endif
 
 
;
;
; Pipeline stalls have been hideous problems for me.  The CPU has been modified
; Pipeline stalls have been hideous problems for me.  The CPU has been modified
; with special logic to keep stages from stalling.  For the most part, this
; with special logic to keep stages from stalling.  For the most part, this
; means that ALU and memory results may be accessed either before or as they
; means that ALU and memory results may be accessed either before or as they
; are written to the register file.  This set of code is designed to test
; are written to the register file.  This set of code is designed to test
; whether this bypass logic works.
; whether this bypass logic works.
#ifdef  NOWAIT_PIPELINE_TEST
#ifdef  NOWAIT_PIPELINE_TEST
nowait_pipeline_test:
nowait_pipeline_test:
        ; Allocate for us some number of registers
        ; Allocate for us some number of registers
        ;
        ;
        SUB     5,SP
        SUB     6,SP
        STO     R0,1(SP)
        ; Leave a spot open on the stack for a local variable,
        STO     R1,2(SP)
        ; kept in memory.
        STO     R2,3(SP)
        STO     R0,2(SP)
        STO     R3,4(SP)
        STO     R1,3(SP)
        STO     R4,5(SP)
        STO     R2,4(SP)
 
        STO     R3,5(SP)
 
        STO     R4,6(SP)
        ;
        ;
        ; Let's start with ALU-ALU testing
        ; Let's start with ALU-ALU testing
        ;       AA: result->input A
        ;       AA: result->input A
 
        CLR     R0
 
        ADD     1,R0
 
        CMP     1,R0
 
        TRAP.NZ R11
 
 
        ;       AA: result->input B
        ;       AA: result->input B
 
        CLR     R0
 
        CLR     R1
 
        ADD     1,R0
 
        CMP     R0,R1
 
        TRAP.Z  R11
 
 
        ;       AA: result->input A on condition
        ;       AA: result->input A on condition
 
        CLRF    R0
 
        ADD.Z   5,R0
 
        CMP     5,R0
 
        TRAP.NZ R11
 
 
        ;       AA: result->input B on condition
        ;       AA: result->input B on condition
 
        CLR     R0
 
        CLRF    R1
 
        ADD.Z   5,R0
 
        CMP     R0,R1
 
        TRAP.Z  R11
 
 
        ;       AA: result->input B plus offset
        ;       AA: result->input B plus offset
 
        CLR     R0
 
        CLRF    R1
 
        ADD     5,R0
 
        CMP     -5(R0),R1
 
        TRAP.NZ R11
 
 
        ;       AA: result->input B plus offset on condition
        ;       AA: result->input B plus offset on condition
 
        CLR     R0
 
        CLRF    R1
 
        ADD.Z   5,R0
 
        CMP     -5(R0),R1
 
        TRAP.NZ R11
 
 
        ;
        ;
        ; Then we need to do ALU-Mem input testing
        ; Then we need to do ALU-Mem input testing
        ;       (not implemented yet)
        ;
 
        CLR     R0
 
        STO     R0,1(SP)
 
        LDI     8352,R0
 
        LOD     1(SP),R0
 
        TST     -1,R0
 
        TRAP.NZ R11
 
 
 
        LDI     937,R0          ; Let's try again, this time something that's
 
        STO     R0,1(SP)        ; not zero
 
        NOOP
 
        LOD     1(SP),R0
 
        CMP     938,R0          ; Let's not compare with self, let's that
 
        TRAP.GE R11             ; masks a problem--compare with a different
 
        CMP     936,R0          ; number instead.
 
        TRAP.LT R11
 
 
        ; Mem output->ALU input testing
        ; Mem output->ALU input testing
        ;       (not implemented yet)
        ;       We just did that as partof our last test
        ; Mem output->MEM input testing
        ; Mem output->MEM input testing
        ;       (not implemented yet)
 
        ;
        ;
        LOD     1(SP),R0
        LDI     5328,R2
        LOD     2(SP),R1
        LOD     1(SP),R2
        LOD     3(SP),R2
        STO     R2,1(SP)
        LOD     4(SP),R3
        LOD     1(SP),R1
        LOD     5(SP),R4
        CMP     937,R1
        ADD     5,SP
        TRAP.NZ R11
 
        ;
 
        LOD     2(SP),R0
 
        LOD     3(SP),R1
 
        LOD     4(SP),R2
 
        LOD     5(SP),R3
 
        LOD     6(SP),R4
 
        ADD     6,SP
        RETN
        RETN
#endif  // NOWAIT_PIPELINE_TEST
#endif  // NOWAIT_PIPELINE_TEST
 
 
        fill    512,0
        fill    512,0
stack:  // Must point to a valid word initially
stack:  // Must point to a valid word initially

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