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| Rev 23 |
Rev 24 |
| Line 1874... |
Line 1874... |
I_RETN <= '1';
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I_RETN <= '1';
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when others => null;
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when others => null;
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end case;
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end case;
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when "01000000"|"01001000"|"01010000"|"01011000"|"01100000"|"01101000"|"01110000"|"01111000" =>
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when "01000000"|"01001000"|"01010000"|"01011000"|"01100000"|"01101000"|"01110000"|"01111000" =>
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-- IN r,(C)
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-- IN r,(C)
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MCycles <= "010";
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MCycles <= "011"; -- Should be 3 MCycles (mcleod_ideafix)
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case to_integer(unsigned(MCycle)) is
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case to_integer(unsigned(MCycle)) is
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when 1 =>
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Set_Addr_To <= aBC;
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when 2 =>
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when 2 =>
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Set_Addr_To <= aBC;
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when 3 =>
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TStates <= "100"; -- MIKEJ should be 4 for IO cycle
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TStates <= "100"; -- MIKEJ should be 4 for IO cycle
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IORQ <= '1';
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IORQ <= '1';
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if IR(5 downto 3) /= "110" then
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if IR(5 downto 3) /= "110" then
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Read_To_Reg <= '1';
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Read_To_Reg <= '1';
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Set_BusA_To(2 downto 0) <= IR(5 downto 3);
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Set_BusA_To(2 downto 0) <= IR(5 downto 3);
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| Line 1891... |
Line 1891... |
when others =>
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when others =>
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end case;
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end case;
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when "01000001"|"01001001"|"01010001"|"01011001"|"01100001"|"01101001"|"01110001"|"01111001" =>
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when "01000001"|"01001001"|"01010001"|"01011001"|"01100001"|"01101001"|"01110001"|"01111001" =>
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-- OUT (C),r
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-- OUT (C),r
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-- OUT (C),0
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-- OUT (C),0
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MCycles <= "010";
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MCycles <= "011"; -- Should be 3 MCycles (mcleod_ideafix)
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case to_integer(unsigned(MCycle)) is
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case to_integer(unsigned(MCycle)) is
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when 1 =>
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when 2 =>
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Set_Addr_To <= aBC;
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Set_Addr_To <= aBC;
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Set_BusB_To(2 downto 0) <= IR(5 downto 3);
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Set_BusB_To(2 downto 0) <= IR(5 downto 3);
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if IR(5 downto 3) = "110" then
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if IR(5 downto 3) = "110" then
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Set_BusB_To(3) <= '1';
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Set_BusB_To(3) <= '1';
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end if;
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end if;
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when 2 =>
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when 3 =>
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TStates <= "100"; -- MIKEJ should be 4 for IO cycle
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TStates <= "100"; -- MIKEJ should be 4 for IO cycle
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Write <= '1';
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Write <= '1';
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IORQ <= '1';
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IORQ <= '1';
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when others =>
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when others =>
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end case;
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end case;
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| Line 1967... |
Line 1967... |
IORQ <= '1';
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IORQ <= '1';
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Write <= '1';
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Write <= '1';
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I_BTR <= '1';
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I_BTR <= '1';
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when 4 =>
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when 4 =>
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NoRead <= '1';
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NoRead <= '1';
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TStates <= "101";
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TStates <= "100"; -- Was "101", to make OUTI to last 16 t-cycles (mcleod_ideafix)
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when others => null;
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when others => null;
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end case;
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end case;
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end case;
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end case;
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end case;
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end case;
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