Subversion Repositories 1000base-x

1000BASE-X IEEE 802.3-2008 Clause 36/37 - PCS Testbench
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The following README describes howto run the 802.3-2008 Clause 36/37 1000BASE-X 
simulation/testbench under ModelSim PE (6.6c) with Xilinx 12.3 Simulation 
libraries (UNISIMS). 

Dave W Pegler { peglerd@gmail.com} 12th February 2012

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1. Download latest version of 1000base-x firmware
-------------------------------------------------

To download the latest version of the 1000base-x firmware, go to :

        http://opencores.org/download,1000base-x

or, using SVN, checkout the trunk:

        svn co http://opencores.org/ocsvn/1000base-x/1000base-x/trunk

[dwp@froggatt ~]$ cd /tmp/
[dwp@froggatt tmp]$ mkdir 1000base-x
[dwp@froggatt tmp]$ cd 1000base-x/

[dwp@froggatt 1000base-x]$ svn co http://opencores.org/ocsvn/1000base-x/1000base-x/trunk

A    trunk/testbench
A    trunk/testbench/rtl
A    trunk/testbench/rtl/verilog
A    trunk/testbench/rtl/verilog/gmii_rx_model.v
A    trunk/testbench/rtl/verilog/gmii_tx_model.v
A    trunk/testbench/rtl/verilog/interfaces.v
A    trunk/testbench/rtl/verilog/clock_gen.v
A    trunk/testbench/rtl/verilog/encoder_8b10b_threads.v
A    trunk/testbench/rtl/verilog/tb_utils.v
A    trunk/testbench/rtl/verilog/decoder_8b_rx_model.v
A    trunk/testbench/rtl/verilog/ge_1000baseX_tb_script.v
A    trunk/testbench/rtl/verilog/ethernet_frame.v
A    trunk/testbench/rtl/verilog/ethernet_threads.v
A    trunk/testbench/rtl/verilog/timescale_tb.v
A    trunk/testbench/rtl/verilog/ge_1000baseX_utils.v
A    trunk/testbench/rtl/verilog/encoder_8b_tx_model.v
A    trunk/testbench/rtl/verilog/ge_1000baseX_tb.v
A    trunk/testbench/rtl/verilog/mdio_serial_model.v
A    trunk/testbench/rtl/verilog/packet.v
A    trunk/testbench/rtl/verilog/encoder_10b_rx_model.v
A    trunk/testbench/wave.do
A    trunk/testbench/scripts
A    trunk/testbench/scripts/compile_ge_1000baseX.sh
A    trunk/testbench/scripts/compile_ge_1000baseX_tb.sh
A    trunk/testbench/scripts/sim_ge_1000baseX_tb.sh
A    trunk/testbench/scripts/compile_unisims.sh
A    trunk/testbench/data
A    trunk/testbench/data/8b10b.dat
A    trunk/rtl
A    trunk/rtl/verilog
A    trunk/rtl/verilog/encoder_8b10b.v
A    trunk/rtl/verilog/ge_1000baseX_fpga.v
A    trunk/rtl/verilog/ge_1000baseX_an.v
A    trunk/rtl/verilog/ge_1000baseX_test.v
A    trunk/rtl/verilog/ge_1000baseX.v
A    trunk/rtl/verilog/ge_1000baseX_regs.v
A    trunk/rtl/verilog/decoder_8b10b.v
A    trunk/rtl/verilog/ge_1000baseX_core.v
A    trunk/rtl/verilog/ge_1000baseX_mdio.v
A    trunk/rtl/verilog/timescale.v
A    trunk/rtl/verilog/ge_1000baseX_rx.v
A    trunk/rtl/verilog/ge_1000baseX_tx.v
A    trunk/rtl/verilog/clean_rst.v
A    trunk/rtl/verilog/ge_1000baseX_constants.v
A    trunk/rtl/verilog/ge_1000baseX_sync.v
A    trunk/doc
A    trunk/doc/802.3-2008_section2.pdf
A    trunk/doc/802.3-2008_section3.pdf
A    trunk/doc/CL36_PCS_Test_Suite_v2.1.pdf
A    trunk/doc/US4486739.pdf
A    trunk/doc/01-581v1.pdf
Checked out revision 4.
[dwp@froggatt 1000base-x]$ 


2. Installing ModelSim PE 6.6c and Xilinx ISE 12.3
--------------------------------------------------

The 1000BASE-X simulation/testbench has been designed to be built with ModelSim PE 6.6c using
UNISIMS libraries from Xilinx ISE 12.3.

To install Xilinx ISE 12.3, go to:

        http://www.xilinx.com/support/documentation/dt_ise12-3.htm

If you install a different version of Xilinx ISE than 12.3, then you will need to update
the XILINXPATH environment variable in the trunk/testbench/scripts/compile_unisims.sh 
script to ensure the correct Xilinx UNISIMS library is compiled.

To install ModelSim 6.6c, see:

        http://model.com/content/modelsim-pe-simulation-and-debug

3. Cygwin Build/Simulation Environment
---------------------------------------

The 1000BASE-X simulation/testbench has been designed to run from within a Cygwin
Linux/Unix shell running on Windows. It is therefore necessary to install 
Cygwin by running the "setup.exe" binary from : 

http://cygwin.com/install.html

The following is a good tutorial on how to install the basic Cygwin system
(which is all you really need):

        http://www2.warwick.ac.uk/fac/sci/moac/people/students/peter_cock/cygwin/part1

Once Cygwin is installed, start a Cygwin Linux/Unix session by double clicking on 
the Cygwin icon (that looks like this: http://www.davix.co.uk/cygwin-icon.gif) which 
should have appeared on your Desktop after the installation. 

When Cygwin is running, you should get a Unix/Linux shell which looks something like this:

        http://www.davix.co.uk/cygwin-screenshot.png

Next navigate to the working directory into which the 1000base-x firmware was downloaded 
in step 1 and then into the trunk/tesbench directory, like so:

        http://www.davix.co.uk/cygwin-screenshot2.png

You are now ready to compile the project and run the simulation by following the next steps..

3. Synthesis/Compilation
-------------------------

First you will need to compile the Xilinx UNISIMS libraries. Do this by typing the 
following in the Cygwin shell (remembering to include the full stop at the beginning): 

        ./scripts/compile_unisims.sh 

Next you will need to compile the 1000base-x firmware. Do this by typing the following 
in the Cygwin shell: 

        ./scripts/compile_ge_1000baseX.sh  

Finally you will need to compile the 1000base-x testbench. Do this by typing the following 
in the Cygwin shell: 

        ./scripts/compile_ge_1000baseX_tb.sh  

and you should get something like this

        http://www.davix.co.uk/cygwin-screenshot3.png

4. Running the Testbench under ModelSim
---------------------------------------

The final step is to startup the ModelSim simulator. Do this by typing the following 
in the Cygwin shell: 

        ./scripts/sim_ge_1000baseX_tb.sh

To start the simulation running type "run -all" in the Transcript window and you 
should get something like this: 

        http://www.davix.co.uk/cygwin-modelsim.png

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