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<span style="font-size:120%;font-weight:bold">Main</span>
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<i>Picoblaze (R) command line assembler and merger</i>
<div id="wikiauthor" style="float:right">
Updated <span title="Thu Mar 31 02:32:59 2011">
Mar 31, 2011</span>
by <a style="white-space: nowrap" href="/u/mediatronix/">mediatronix</a>
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<h1><a name="Introduction"></a>Introduction<a href="#Introduction" class="section_anchor"></a></h1><p>The main feature of this assembler is the possibility to initialize the contents of the scratch-pad memory, provided it is implemented as a block-ram. The scratch-pad memory can be the second port of the code rom; this port is an 8-bit port. You can write: </p><pre class="prettyprint"> .SCR 0x380 ; equal to 0x700 as seen from the 8 bit-port.
prompt .TXT "\r\n>>" ; 5 characters, CR, LF, 2 '>'s and a trailing zero.
count .BUF 4 ; uninitialized 4 byte variable
end .BYT 0x55 ; initialized 1 byte variable</pre><h1><a name="Directives"></a>Directives<a href="#Directives" class="section_anchor"></a></h1><h3><a name=".EQU"></a>.EQU<a href="#.EQU" class="section_anchor"></a></h3><p>Equate the value of an identifier to the value of the expression. </p><pre class="prettyprint">Ten .EQU 2 * 5 ; The ident Ten now has the value 10
Accu .EQU s8 ; The ident Accu can be used instead of register s8</pre><h3><a name=".ORG"></a>.ORG<a href="#.ORG" class="section_anchor"></a></h3><p>Set the origin of the next instruction </p><pre class="prettyprint"> .ORG 0x100</pre><h3><a name=".SCR"></a>.SCR<a href="#.SCR" class="section_anchor"></a></h3><p>Set the origin of the scratchpad memory in the code rom in case the second port of the code rom blockram is used as such or set it to 0x400 if a different blockram is used. </p><pre class="prettyprint"> .SCR 0x380 ; use the last 128 words (=256 bytes) of the code rom
.SCR 0x400 ; use a separate blockram or distributed ram</pre><h3><a name=".TXT"></a>.TXT<a href="#.TXT" class="section_anchor"></a></h3><p>Initialize the scratchpad with the textstring, including a zero byte. </p><pre class="prettyprint">prompt .TXT "\r\n>>" ; 5 characters, CR, LF, 2 '>'s and a trailing zero.</pre><h3><a name=".BYT"></a>.BYT<a href="#.BYT" class="section_anchor"></a></h3><pre class="prettyprint">ver .BYT 0x55 ; initialized 1 byte variable</pre><h3><a name=".WBE_and_.WLE"></a>.WBE and .WLE<a href="#.WBE_and_.WLE" class="section_anchor"></a></h3><pre class="prettyprint">val2 .WBE 0xAA55 ; initialized 2 byte variable, AA first byte
val3 .WLE 0xAA55 ; initialized 2 byte variable, 55 first byte</pre><h3><a name=".LBE_and_.LLE"></a>.LBE and .LLE<a href="#.LBE_and_.LLE" class="section_anchor"></a></h3><pre class="prettyprint">val2 .LBE 0xAA123455 ; initialized 4 byte variable, AA first byte
val3 .LLE 0xAA123455 ; initialized 4 byte variable, 55 first byte</pre><h3><a name=".BUF"></a>.BUF<a href="#.BUF" class="section_anchor"></a></h3><pre class="prettyprint">count .BUF 4 ; uninitialized 4 byte variable</pre><h1><a name="Prefered_mnemonics"></a>Prefered mnemonics<a href="#Prefered_mnemonics" class="section_anchor"></a></h1><pre class="prettyprint"> MOVE instead of LOAD
LD instead of FETCH
ST instead of STORE
RET instead of RETURN
RETI instead of RETURNI
ADDC instead of ADDCY
SUBC instead of SUBCY
IN instead of INPUT
OUT instead of OUTPUT
EINT instead of ENABLE INTERRUPT
DINT instead of DISABLE INTERRUPT </pre><h1><a name="Scratchpad_Initialization"></a>Scratchpad Initialization<a href="#Scratchpad_Initialization" class="section_anchor"></a></h1><p>Initialization of the scratchpad memory is done is the assembler source by specifying the origin of the scratchpad by the .SCR directive. The scratchpad can be either the blockram used for the CodeROM itself using the second (byte-wide) port of that blockram or the distributed memory based scratchpad as implemented in the original kcpsm3 core. Basically the pBlazMEM tool replaces instances on {INIT_XX}, {INITP_XX} and {INITD_XX} by constant strings with the appropriate values, similar to the kcpsmasm tool of Xilinx. New is the possibility to initializing the scratchpad in addition to initializing the CodeROM. </p><p>New is the {INITD_XX} template to initialize distributed ram parts. Use someting like this: </p><pre class="prettyprint">{begin template} -- at start of file
...
store_block: block is
type INIT_ARRAY_t is array( 0 downto 7 ) of bit_vector( 63 downto 0 ) ;
constant INIT_ARRAY : INIT_ARRAY_t := (
B"{INITD_00}",
B"{INITD_01}",
B"{INITD_02}",
B"{INITD_03}",
B"{INITD_04}",
B"{INITD_05}",
B"{INITD_06}",
B"{INITD_07}"
) ;
begin
store_loop: for i in 0 to 7 generate
begin
memory_bit: RAM64X1S
generic map(
INIT => INIT_ARRAY( i )
)
port map (
D => sx( i ),
WE => memory_enable,
WCLK => clk,
A0 => second_operand( 0 ),
A1 => second_operand( 1 ),
A2 => second_operand( 2 ),
A3 => second_operand( 3 ),
A4 => second_operand( 4 ),
A5 => second_operand( 5 ),
O => memory_data( i )
) ;
store_flop: FD
port map (
D => memory_data( i ),
Q => store_data( i ),
C => clk
) ;
end generate store_loop ;
end block ;</pre><p>as a template instead of the store_loop construct in the KCPSM.VHD file. </p><h1><a name="Makefile"></a>Makefile<a href="#Makefile" class="section_anchor"></a></h1><p>Use a makefile like this to automate the assembly and merging: </p><pre class="prettyprint"># path to tools
AS="C:/SVN/pBlazASM/pBlazASM.exe"
MG="C:/SVN/pBlazMRG/pBlazMRG.exe"
RM = rm -f -v
CP = cp
# List of PSM Files
ASM_SRC = Init.psm Inband.psh SPI.psm I2C.psm UART.psm delay.psm Inband.psm MYROM.psm
AFLAGS = -l -m
MGFLAGS =
TEMPLATE = template
ENTITY = CodeROM
.SUFFIXES : .psm .mem .vhd .psh
# assemble and merge
all: $(ENTITY).vhd
$(ENTITY).mem: $(ASM_SRC)
$(AS) $(ASM_SRC) $(AFLAGS)
$(ENTITY).vhd: $(ENTITY).mem $(TEMPLATE).vhd
$(MG) $(MGFLAGS) -e$(ENTITY) $(ENTITY).mem $(TEMPLATE).vhd $(ENTITY).vhd
$(CP) $(ENTITY).vhd ..
# clean outputs
clean:
$(RM) $(ENTITY).lst $(ENTITY).mem $(ENTITY).vhd </pre><h1><a name="Operation_with_BMM_and_MEM_in_an_ISE_project"></a>Operation with BMM and MEM in an ISE project<a href="#Operation_with_BMM_and_MEM_in_an_ISE_project" class="section_anchor"></a></h1><p>Use a BMM file like this to associate the MEM file with your ISE design: </p><pre class="prettyprint">ADDRESS_SPACE Code_ROM RAMB18 WORD_ADDRESSING [0x00000000:0x000003FF]
BUS_BLOCK
iPico/program/prog_rom [17:0] ;
END_BUS_BLOCK;
END_ADDRESS_SPACE;</pre><p>The name of the block RAM (here: iPico/program/prog_rom) needs to be derived from the design through some voodoo, like xdl.exe. </p><p>Merge is not necessary anymore. Add the CodeROM.MRG and CodeROM.BMM files to your ISE project. Add the following 'Other Bitgen Command Line Options' to the 'Generate programming file' (BitGen) function of your ISE project: </p><pre class="prettyprint"> -bd CodeROM.MEM</pre><p>Now when 'make'ing a new version of CodeROM.MEM, ISE will see it has changed and 'Generate programming file' can be rerun to make a new bit/bin file. </p><p>Remove the merge step from the makefile, since it would invalidate CodeROM.VHD, which will trigger a full build of your FPGA, instead of a mere BitGen. </p>
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