URL
https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk
Subversion Repositories mips_enhanced
[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-xilinx-ml403/] [leon3mp.xcf] - Rev 2
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NET sram_clk FEEDBACK = 1.0 NET sram_clk_fb;
#NET ddr_clk FEEDBACK = 1.0 NET ddr_clk_fb;
NET "clkm" TNM_NET = "clkm";
NET "clkml" TNM_NET = "clkml";
TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
NET "lock" TIG;
NET phy_tx_data(*) TNM = gtxphypads;
NET "egtx_clk" TNM_NET = "egtx_clk";
TIMESPEC "TS_clkm_egtx_clk" = FROM "clkm" TO "egtx_clk" TIG;
TIMESPEC "TS_egtx_clk_clkm" = FROM "egtx_clk" TO "clkm" TIG;
TIMESPEC "TSGTXOUT" = FROM "egtx_clk" TO "PADS" 6 ns;
#TIMESPEC "TSGRXIN" = FROM "PADS" TO "eth1_e1_m1000_u0_rxclk" 10 ns;
NET sys_clk period = 10.000 ;
NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb";
TIMESPEC "TS_ddr_clk_fb" = PERIOD "ddr_clk_fb" 8.000 ns HIGH 50.00%;