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https://opencores.org/ocsvn/opb_onewire/opb_onewire/trunk
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[/] [opb_onewire/] [trunk/] [s3e_onewire_master_v1_00_a/] [read_write_functions.txt] - Rev 4
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void OneWireReset (void) {
volatile int x;
// Reset the 1-wire bus
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x8,0x3); // Send the opcode for a bus reset
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0xC,0x1); // Execute!
// Wait a little while...
x=0;
while (x < 25000) {
x++;
}
}
void OneWireWrite (unsigned char data) {
volatile int x;
volatile unsigned char ReadBUF;
// Send skip ROM command
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x8,0x1); // Send the opcode for a write
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x4,data); // Send the data for a write
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0xC,0x1); // Execute!
// Wait a little while...
x=0;
while (x < 5000) {
x++;
}
}
unsigned char OneWireRead (void) {
volatile int x;
volatile unsigned char ReadBUF;
// Read a byte
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x8,0x2); // Send the opcode for a read
WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0xC,0x1); // Execute!
// Wait a little while...
x=0;
while (x < 5000) {
x++;
}
ReadBUF = ReadREG(XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x0); // Read the data
return ReadBUF;
}