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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_ADC/] [PLLJ_PLLSPE_INFO.txt] - Rev 221

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PLL_Name        DE0_NANO_SOC_QSYS:u0|DE0_NANO_SOC_QSYS_pll_sys:pll_sys|altera_pll:altera_pll_i|general[0].gpll~FRACTIONAL_PLL
PLLJITTER       26
PLLSPEmax       100
PLLSPEmin       -100

PLL_Name        DE0_NANO_SOC_QSYS:u0|DE0_NANO_SOC_QSYS_pll_sys:pll_sys|altera_pll:altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER
PLLJITTER       NA
PLLSPEmax       NA
PLLSPEmin       NA

PLL_Name        DE0_NANO_SOC_QSYS:u0|DE0_NANO_SOC_QSYS_pll_sys:pll_sys|altera_pll:altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER
PLLJITTER       NA
PLLSPEmax       NA
PLLSPEmin       NA

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