OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [vecinit-1.c] - Rev 691

Compare with Previous | Blame | View Log

/* { dg-do compile } */
/* { dg-options "-O2 -march=k8 -msse2 -mno-sse4" } */
 
#define vector __attribute__((vector_size(16)))
 
float a;
vector float f1(void) { return (vector float){ a, 0.0, 0.0, 0.0}; }
vector float f2(void) { return (vector float){ 0.0, a, 0.0, 0.0}; }
vector float f3(void) { return (vector float){ 0.0, 0.0, a, 0.0}; }
vector float f4(void) { return (vector float){ 0.0, 0.0, 0.0, a}; }
/* { dg-final { scan-assembler-not "movaps" } } */
/* { dg-final { scan-assembler-not "xor" } } */
/* { dg-final { scan-assembler-not "%mm" } } */
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.