OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [frv/] [fr450-spr.d] - Rev 205

Compare with Previous | Blame | View Log

#as: -mcpu=fr450
#objdump: -dr

.*:     file format .*

Disassembly of section \.text:

.* <\.text>:
.*:     80 0c 01 84     movgs gr4,psr
.*:     80 0c 11 84     movgs gr4,pcsr
.*:     80 0c 21 84     movgs gr4,bpcsr
.*:     80 0c 31 84     movgs gr4,tbr
.*:     80 0c 41 84     movgs gr4,bpsr
.*:     80 0d 01 84     movgs gr4,hsr0
.*:     88 0c 01 84     movgs gr4,ccr
.*:     88 0c 71 84     movgs gr4,cccr
.*:     88 0d 01 84     movgs gr4,lr
.*:     88 0d 11 84     movgs gr4,lcr
.*:     88 0d 81 84     movgs gr4,iacc0h
.*:     88 0d 91 84     movgs gr4,iacc0l
.*:     88 0e 01 84     movgs gr4,isr
.*:     90 0c 01 84     movgs gr4,epcr0
.*:     92 0c 01 84     movgs gr4,esr0
.*:     92 0c e1 84     movgs gr4,esr14
.*:     92 0c f1 84     movgs gr4,esr15
.*:     94 0e 11 84     movgs gr4,esfr1
.*:     9a 0c 01 84     movgs gr4,scr0
.*:     9a 0c 11 84     movgs gr4,scr1
.*:     9a 0c 21 84     movgs gr4,scr2
.*:     9a 0c 31 84     movgs gr4,scr3
.*:     a8 0c 01 84     movgs gr4,msr0
.*:     a8 0c 11 84     movgs gr4,msr1
.*:     b0 0c 01 84     movgs gr4,ear0
.*:     b0 0c f1 84     movgs gr4,ear15
.*:     b4 0c 01 84     movgs gr4,iamlr0
.*:     b4 0c 11 84     movgs gr4,iamlr1
.*:     b4 0c 21 84     movgs gr4,iamlr2
.*:     b4 0c 31 84     movgs gr4,iamlr3
.*:     b4 0c 41 84     movgs gr4,iamlr4
.*:     b4 0c 51 84     movgs gr4,iamlr5
.*:     b4 0c 61 84     movgs gr4,iamlr6
.*:     b4 0c 71 84     movgs gr4,iamlr7
.*:     b6 0c 01 84     movgs gr4,iampr0
.*:     b6 0c 11 84     movgs gr4,iampr1
.*:     b6 0c 21 84     movgs gr4,iampr2
.*:     b6 0c 31 84     movgs gr4,iampr3
.*:     b6 0c 41 84     movgs gr4,iampr4
.*:     b6 0c 51 84     movgs gr4,iampr5
.*:     b6 0c 61 84     movgs gr4,iampr6
.*:     b6 0c 71 84     movgs gr4,iampr7
.*:     b8 0c 01 84     movgs gr4,damlr0
.*:     b8 0c 11 84     movgs gr4,damlr1
.*:     b8 0c 21 84     movgs gr4,damlr2
.*:     b8 0c 31 84     movgs gr4,damlr3
.*:     b8 0c 41 84     movgs gr4,damlr4
.*:     b8 0c 51 84     movgs gr4,damlr5
.*:     b8 0c 61 84     movgs gr4,damlr6
.*:     b8 0c 71 84     movgs gr4,damlr7
.*:     b8 0c 81 84     movgs gr4,damlr8
.*:     b8 0c 91 84     movgs gr4,damlr9
.*:     b8 0c a1 84     movgs gr4,damlr10
.*:     b8 0c b1 84     movgs gr4,damlr11
.*:     ba 0c 01 84     movgs gr4,dampr0
.*:     ba 0c 11 84     movgs gr4,dampr1
.*:     ba 0c 21 84     movgs gr4,dampr2
.*:     ba 0c 31 84     movgs gr4,dampr3
.*:     ba 0c 41 84     movgs gr4,dampr4
.*:     ba 0c 51 84     movgs gr4,dampr5
.*:     ba 0c 61 84     movgs gr4,dampr6
.*:     ba 0c 71 84     movgs gr4,dampr7
.*:     ba 0c 81 84     movgs gr4,dampr8
.*:     ba 0c 91 84     movgs gr4,dampr9
.*:     ba 0c a1 84     movgs gr4,dampr10
.*:     ba 0c b1 84     movgs gr4,dampr11
.*:     bc 0c 01 84     movgs gr4,amcr
.*:     bc 0c 51 84     movgs gr4,iamvr1
.*:     bc 0c 71 84     movgs gr4,damvr1
.*:     bc 0d 01 84     movgs gr4,cxnr
.*:     bc 0d 11 84     movgs gr4,ttbr
.*:     bc 0d 21 84     movgs gr4,tplr
.*:     bc 0d 31 84     movgs gr4,tppr
.*:     bc 0d 41 84     movgs gr4,tpxr
.*:     bc 0e 01 84     movgs gr4,timerh
.*:     bc 0e 11 84     movgs gr4,timerl
.*:     bc 0e 21 84     movgs gr4,timerd
.*:     c0 0c 01 84     movgs gr4,dcr
.*:     c0 0c 11 84     movgs gr4,brr
.*:     c0 0c 21 84     movgs gr4,nmar
.*:     c0 0c 31 84     movgs gr4,btbr
.*:     c0 0c 41 84     movgs gr4,ibar0
.*:     c0 0c 51 84     movgs gr4,ibar1
.*:     c0 0c 61 84     movgs gr4,ibar2
.*:     c0 0c 71 84     movgs gr4,ibar3
.*:     c0 0c 81 84     movgs gr4,dbar0
.*:     c0 0c 91 84     movgs gr4,dbar1
.*:     c0 0c a1 84     movgs gr4,dbar2
.*:     c0 0c b1 84     movgs gr4,dbar3
.*:     c0 0c c1 84     movgs gr4,dbdr00
.*:     c0 0c d1 84     movgs gr4,dbdr01
.*:     c0 0c e1 84     movgs gr4,dbdr02
.*:     c0 0c f1 84     movgs gr4,dbdr03
.*:     c0 0d 01 84     movgs gr4,dbdr10
.*:     c0 0d 11 84     movgs gr4,dbdr11
.*:     c0 0d c1 84     movgs gr4,dbmr00
.*:     c0 0d d1 84     movgs gr4,dbmr01
.*:     c0 0e 01 84     movgs gr4,dbmr10
.*:     c0 0e 11 84     movgs gr4,dbmr11

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.