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#ifndef CYGONCE_HAL_PLATFORM_INTS_H
#define CYGONCE_HAL_PLATFORM_INTS_H
//==========================================================================
//
//      hal_platform_ints.h
//
//      HAL Interrupt and clock support
//
//==========================================================================
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// for more details.                                                        
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//
// As a special exception, if other files instantiate templates or use      
// macros or inline functions from this file, or you compile this file      
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// General Public License v2.                                               
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// ####ECOSGPLCOPYRIGHTEND####                                              
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    jskov
// Contributors: jskov
// Date:         2001-11-02
// Purpose:      Define Interrupt support
// Description:  The interrupt details for the Agilent AAED2000 are defined here.
// Usage:
//               #include <cyg/hal/hal_platform_ints.h>
//               ...
//              
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
// These are interrupts on the AAEC-2000 core
 
#define CYGNUM_HAL_INTERRUPT_GPIO0FIQ      0
#define CYGNUM_HAL_INTERRUPT_TS            CYGNUM_HAL_INTERRUPT_GPIO0FIQ
#define CYGNUM_HAL_INTERRUPT_BLINT         1
#define CYGNUM_HAL_INTERRUPT_WEINT         2
#define CYGNUM_HAL_INTERRUPT_MCINT         3
#define CYGNUM_HAL_INTERRUPT_CSINT         4
#define CYGNUM_HAL_INTERRUPT_GPIO1INTR     5
#define CYGNUM_HAL_INTERRUPT_ETH           CYGNUM_HAL_INTERRUPT_GPIO1INTR
#define CYGNUM_HAL_INTERRUPT_GPIO2INTR     6
#define CYGNUM_HAL_INTERRUPT_PCMCIA_CD2    CYGNUM_HAL_INTERRUPT_GPIO2INTR
#define CYGNUM_HAL_INTERRUPT_GPIO3INTR     7
#define CYGNUM_HAL_INTERRUPT_PCMCIA_CD1    CYGNUM_HAL_INTERRUPT_GPIO3INTR
#define CYGNUM_HAL_INTERRUPT_TC1OI         8
#define CYGNUM_HAL_INTERRUPT_TC2OI         9
#define CYGNUM_HAL_INTERRUPT_RTCMI        10
#define CYGNUM_HAL_INTERRUPT_TINTR        11
#define CYGNUM_HAL_INTERRUPT_UART1INTR    12
#define CYGNUM_HAL_INTERRUPT_UART2INTR    13
#define CYGNUM_HAL_INTERRUPT_LCDINTR      14
#define CYGNUM_HAL_INTERRUPT_SSEOTI       15
#define CYGNUM_HAL_INTERRUPT_UART3INTR    16
#define CYGNUM_HAL_INTERRUPT_SCIINTR      17
#define CYGNUM_HAL_INTERRUPT_AACINTR      18
#define CYGNUM_HAL_INTERRUPT_MMCINTR      19
#define CYGNUM_HAL_INTERRUPT_USBINTR      20
#define CYGNUM_HAL_INTERRUPT_DMAINTR      21
#define CYGNUM_HAL_INTERRUPT_TC3OI        22
#define CYGNUM_HAL_INTERRUPT_GPIO4INTR    23
#define CYGNUM_HAL_INTERRUPT_SCI_VCCEN    CYGNUM_HAL_INTERRUPT_GPIO4INTR
#define CYGNUM_HAL_INTERRUPT_GPIO5INTR    24
#define CYGNUM_HAL_INTERRUPT_SCI_DETECT   CYGNUM_HAL_INTERRUPT_GPIO5INTR
#define CYGNUM_HAL_INTERRUPT_GPIO6INTR    25
#define CYGNUM_HAL_INTERRUPT_PCMCIA_RDY1  CYGNUM_HAL_INTERRUPT_GPIO6INTR
#define CYGNUM_HAL_INTERRUPT_GPIO7INTR    26
#define CYGNUM_HAL_INTERRUPT_PCMCIA_RDY2  CYGNUM_HAL_INTERRUPT_GPIO7INTR
#define CYGNUM_HAL_INTERRUPT_BMIINTR      27
 
#define CYGNUM_HAL_INTERRUPT_NONE    -1
 
#define CYGNUM_HAL_ISR_MIN            0
#define CYGNUM_HAL_ISR_MAX            (CYGNUM_HAL_INTERRUPT_BMIINTR)
 
#define CYGNUM_HAL_ISR_COUNT          (CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN+1)
 
// The vector used by the Real time clock
#define CYGNUM_HAL_INTERRUPT_RTC      CYGNUM_HAL_INTERRUPT_TC1OI
 
//----------------------------------------------------------------------------
// Reset.
 
externC void cyg_hal_arm9_soft_reset(CYG_ADDRESS);
#define HAL_PLATFORM_RESET() cyg_hal_arm9_soft_reset(0)
 
#define HAL_PLATFORM_RESET_ENTRY 0x00000000
 
#endif // CYGONCE_HAL_PLATFORM_INTS_H