Subversion Repositories openriscdevboard

../rtl/usbhostslave/buffers/dpMem_dc.v
../rtl/usbhostslave/buffers/fifoRTL.v
../rtl/usbhostslave/buffers/RxFifoBI.v
../rtl/usbhostslave/buffers/TxFifoBI.v
../rtl/usbhostslave/buffers/RxFifo.v
../rtl/usbhostslave/buffers/TxFifo.v
../rtl/usbhostslave/busInterface/wishBoneBI.v
../rtl/usbhostslave/hostController/directControl.v
../rtl/usbhostslave/hostController/getPacket.v
../rtl/usbhostslave/hostController/hctxportarbiter.v
../rtl/usbhostslave/hostController/hostcontroller.v
../rtl/usbhostslave/hostController/rxStatusMonitor.v
../rtl/usbhostslave/hostController/sendPacket.v
../rtl/usbhostslave/hostController/sendpacketarbiter.v
../rtl/usbhostslave/hostController/sendpacketcheckpreamble.v
../rtl/usbhostslave/hostController/sofcontroller.v
../rtl/usbhostslave/hostController/softransmit.v
../rtl/usbhostslave/hostController/speedctrlMux.v
../rtl/usbhostslave/hostController/usbHostControl.v
../rtl/usbhostslave/hostController/USBHostControlBI.v
../rtl/usbhostslave/hostSlaveMux/hostSlaveMux.v
../rtl/usbhostslave/hostSlaveMux/hostSlaveMuxBI.v
../rtl/usbhostslave/serialInterfaceEngine/lineControlUpdate.v
../rtl/usbhostslave/serialInterfaceEngine/processRxBit.v
../rtl/usbhostslave/serialInterfaceEngine/processRxByte.v
../rtl/usbhostslave/serialInterfaceEngine/processTxByte.v
../rtl/usbhostslave/serialInterfaceEngine/readUSBWireData.v
../rtl/usbhostslave/serialInterfaceEngine/siereceiver.v
../rtl/usbhostslave/serialInterfaceEngine/SIETransmitter.v
../rtl/usbhostslave/serialInterfaceEngine/updateCRC5.v
../rtl/usbhostslave/serialInterfaceEngine/updateCRC16.v
../rtl/usbhostslave/serialInterfaceEngine/usbSerialInterfaceEngine.v
../rtl/usbhostslave/serialInterfaceEngine/usbTxWireArbiter.v
../rtl/usbhostslave/serialInterfaceEngine/writeUSBWireData.v
../rtl/usbhostslave/slaveController/endpMux.v
../rtl/usbhostslave/slaveController/fifoMux.v
../rtl/usbhostslave/slaveController/sctxportarbiter.v
../rtl/usbhostslave/slaveController/slavecontroller.v
../rtl/usbhostslave/slaveController/slaveDirectcontrol.v
../rtl/usbhostslave/slaveController/slaveGetpacket.v
../rtl/usbhostslave/slaveController/slaveRxStatusMonitor.v
../rtl/usbhostslave/slaveController/slaveSendpacket.v
../rtl/usbhostslave/slaveController/usbSlaveControl.v
../rtl/usbhostslave/slaveController/USBSlaveControlBI.v
../rtl/usbhostslave/wrapper/usbHost.v
../rtl/usbhostslave/wrapper/usbSlave.v
../rtl/usbhostslave/wrapper/usbHostCyc2Wrap.v
../rtl/usbhostslave/wrapper/usbSlaveCyc2Wrap.v

../rtl/spiMaster/sm_dpMem_dc.v
../rtl/spiMaster/sm_fifoRTL.v
../rtl/spiMaster/sm_RxFifoBI.v
../rtl/spiMaster/sm_TxFifoBI.v
../rtl/spiMaster/sm_RxFifo.v
../rtl/spiMaster/sm_TxFifo.v
../rtl/spiMaster/initSD.v
../rtl/spiMaster/readWriteSPIWireData.v
../rtl/spiMaster/readWriteSDBlock.v
../rtl/spiMaster/sendCmd.v
../rtl/spiMaster/spiCtrl.v
../rtl/spiMaster/spiTxRxData.v
../rtl/spiMaster/spiMasterWishBoneBI.v
../rtl/spiMaster/ctrlStsRegBI.v
../rtl/spiMaster/spiMaster.v

../rtl/mem_ctrl/mc_wb_if.v
../rtl/mem_ctrl/mc_adr_sel.v
../rtl/mem_ctrl/mc_cs_rf.v
../rtl/mem_ctrl/mc_dp.v
../rtl/mem_ctrl/mc_incn_r.v
../rtl/mem_ctrl/mc_mem_if.v
../rtl/mem_ctrl/mc_obct.v
../rtl/mem_ctrl/mc_obct_top.v
../rtl/mem_ctrl/mc_rd_fifo.v
../rtl/mem_ctrl/mc_refresh.v
../rtl/mem_ctrl/mc_rf.v
../rtl/mem_ctrl/mc_timing.v
../rtl/mem_ctrl/mc_top.v
../rtl/uart16550/raminfr.v
../rtl/uart16550/uart_debug_if.v
../rtl/uart16550/uart_receiver.v
../rtl/uart16550/uart_regs.v
../rtl/uart16550/uart_rfifo.v
../rtl/uart16550/uart_sync_flops.v
../rtl/uart16550/uart_tfifo.v
../rtl/uart16550/uart_top.v
../rtl/uart16550/uart_transmitter.v
../rtl/uart16550/uart_wb.v
../rtl/top/tc_top.v
#        ../rtl/top/cyc_or12_mini_top.v
../rtl/top/cyc_or12_mini_top_sdCard.v
../rtl/or1200/or1200_xcv_ram32x8d.v
../rtl/or1200/or1200_alu.v
../rtl/or1200/or1200_amultp2_32x32.v
../rtl/or1200/or1200_cfgr.v
../rtl/or1200/or1200_cpu.v
../rtl/or1200/or1200_ctrl.v
../rtl/or1200/or1200_dc_fsm.v
../rtl/or1200/or1200_dc_ram.v
../rtl/or1200/or1200_dc_tag.v
../rtl/or1200/or1200_dc_top.v
../rtl/or1200/or1200_dmmu_tlb.v
../rtl/or1200/or1200_dmmu_top.v
../rtl/or1200/or1200_dpram_32x32.v
../rtl/or1200/or1200_dpram_256x32.v
../rtl/or1200/or1200_du.v
../rtl/or1200/or1200_except.v
../rtl/or1200/or1200_freeze.v
../rtl/or1200/or1200_genpc.v
../rtl/or1200/or1200_gmultp2_32x32.v
../rtl/or1200/or1200_ic_fsm.v
../rtl/or1200/or1200_ic_ram.v
../rtl/or1200/or1200_ic_tag.v
../rtl/or1200/or1200_ic_top.v
../rtl/or1200/or1200_if.v
../rtl/or1200/or1200_immu_tlb.v
../rtl/or1200/or1200_immu_top.v
../rtl/or1200/or1200_iwb_biu.v
../rtl/or1200/or1200_lsu.v
../rtl/or1200/or1200_mem2reg.v
../rtl/or1200/or1200_mult_mac.v
../rtl/or1200/or1200_operandmuxes.v
../rtl/or1200/or1200_pic.v
../rtl/or1200/or1200_pm.v
../rtl/or1200/or1200_qmem_top.v
../rtl/or1200/or1200_reg2mem.v
../rtl/or1200/or1200_rf.v
../rtl/or1200/or1200_rfram_generic.v
../rtl/or1200/or1200_sb.v
../rtl/or1200/or1200_sb_fifo.v
../rtl/or1200/or1200_spram_32x24.v
../rtl/or1200/or1200_spram_64x14.v
../rtl/or1200/or1200_spram_64x22.v
../rtl/or1200/or1200_spram_64x24.v
../rtl/or1200/or1200_spram_128x32.v
../rtl/or1200/or1200_spram_256x21.v
../rtl/or1200/or1200_spram_512x20.v
../rtl/or1200/or1200_spram_1024x8.v
../rtl/or1200/or1200_spram_1024x32.v
../rtl/or1200/or1200_spram_1024x32_bw.v
../rtl/or1200/or1200_spram_2048x8.v
../rtl/or1200/or1200_spram_2048x32.v
../rtl/or1200/or1200_spram_2048x32_bw.v
../rtl/or1200/or1200_sprs.v
../rtl/or1200/or1200_top.v
../rtl/or1200/or1200_tpram_32x32.v
../rtl/or1200/or1200_tt.v
../rtl/or1200/or1200_wb_biu.v
../rtl/or1200/or1200_wbmux.v
../rtl/mem_if/generic_sram_top.v
../rtl/dbg_interface/timescale.v
../rtl/dbg_interface/dbg_crc8_d1.v
../rtl/dbg_interface/dbg_register.v
../rtl/dbg_interface/dbg_registers.v
../rtl/dbg_interface/dbg_sync_clk1_clk2.v
../rtl/dbg_interface/dbg_top.v
../rtl/dbg_interface/dbg_trace.v
../model/mt48lc2m32b2.v
../model/uart_rx.v
../bench/testHarness.v
+incdir+../rtl/or1200
+incdir+../rtl/top
+incdir+../rtl/mem_ctrl
+incdir+../rtl/uart16550
+incdir+../rtl/spiMaster
+incdir+../rtl/dbg_interface
+incdir+../rtl/usbhostslave/include
+define+SIM_COMPILE