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/* sprs.c -- Simulation of OR1K special-purpose registers
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
 
#include "arch.h"
#include "sprs.h"
#include "abstract.h"
 
extern int cont_run;   /* defined in toplevel.c */
extern int tt_stopped; /* defined in tick.c */
extern int flag;
 
sprword sprs[MAX_SPRS];
 
int temp_disable_except = 0;
int audio_cnt = 0;
 
static FILE *fo = 0;
/* Set a specific SPR with a value. */
inline void
mtspr(const int regno, const sprword value)
{
  int ofs = regno % MAX_SPRS_PER_GRP;
  extern unsigned long pc_phy;
 
  /* MM: Register hooks.  */
  switch (regno) {
  case 0xFFFD:
    fo = fopen ("audiosim.pcm", "wb+");
    if (!fo) printf("Cannot open audiosim.pcm\n");
    printf("Audio opened.\n");
    return;
  case 0xFFFE:
    if (!fo) printf("audiosim.pcm not opened\n");
    fputc (value & 0xFF, fo);
    if ((audio_cnt % 1024) == 0)
      printf("%i\n", audio_cnt);
    audio_cnt++;
    return;
  case 0xFFFF:
    fclose(fo);
    printf("Audio closed.\n");
    cont_run = 0;
    return;
  case SPR_TTMR:
    /* CZ -- 04/09/01 Clear the interrupt in the PIC also... */
    /* If it's cleared now and it was set, then we need to fix it */
    if(~value & SPR_TTMR_IP & sprs[SPR_TTMR])
      setsprbit(SPR_PICSR, 3, 0);
    if (value & SPR_TTMR_M == 2) break;
  case SPR_TTCR:
    tt_stopped = 0;
    break;
  case 0x1234:
    printf("MTSPR(0x1234, 0x%x);\n", value);
    break;
  case 0x1235:
    {
      FILE *f;
      if (!(f = fopen("stdout.txt", "a+"))) 
        {
          perror(strerror(errno));
          return;
        }
      fprintf(f, "%c", value);
      if (fclose(f))
        perror(strerror(errno));
    }
    break;
  case SPR_SR:
    if(value & SPR_SR_F)
      flag = 1;
    else
      flag = 0;
    sprs[SPR_SR] = value;
    break;
  case SPR_EPCR_BASE:
    if((value & 0xffffff00) == 0x00020600) 
      {
        printf("SIMON: EPCR = ext_int\n");
        cont_run = 0;
      } 
    break;
  case SPR_NPC:
    {
      extern unsigned long pc;
      extern unsigned long pcnext;
      extern int delay_insn;
      extern unsigned long pcdelay;
 
      /* The debugger has redirected us to a new address */
      /* This is usually done to reissue an instruction
         which just caused a breakpoint exception. */
      pcnext = value;
 
      if(!value)
        printf("WARNING: PC just set to 0!\n");
 
      /* Clear any pending delay slot jumps also */
      delay_insn = 0;
      pcdelay = value + 4;
    }
    break;
  }
 
  if (regno < MAX_SPRS)
    sprs[regno] = value;
  else {
    printf("\nABORT: write out of SPR range %08X\n", regno);
    cont_run = 0;
  }
}
 
/* Get a specific SPR. */
inline sprword
mfspr_(const int regno)
{
  /* CZ 21/06/01 ... the debugger wants to do this! */
  {
    extern unsigned long pc;
    extern unsigned long prevpc;
    if (regno == SPR_NPC)
      return pc;
    else if (regno == SPR_PPC)
      return prevpc;
  }
 
  /* MM: l.rfe, for example, temporarly disables
     exceptions.  We will make it appear as SR bit
     is set.  */
  if (regno == SPR_SR && temp_disable_except > 0)
    return sprs[regno] & ~SPR_SR_EXR;
  /*  printf("mfspr(%x)%x\n", regno, sprs[regno]); */
 
  if (regno < MAX_SPRS)
    return sprs[regno];
  else {
    printf("\nABORT: read out of SPR range %08X\n", regno);
    cont_run = 0;
  } 
  return 0;
}
 
/* Set a specific bit from SPR. LSB in a word is numbered zero. */
inline void
setsprbit(const int regno, const int bitnum, const unsigned long bitvalue)
{
  sprword mask;
  sprword regvalue = mfspr(regno);
 
  mask = ~(1 << bitnum);
 
  mtspr(regno, (regvalue & mask) | ((bitvalue & 0x1) << bitnum));
 
  return;
}
 
/* Get a specific bit from SPR. */
inline int
getsprbit(const int regno, const int bitnum)
{
  sprword regvalue = mfspr(regno);
 
  return (regvalue >> bitnum) & 0x1;
}
 
/* Set specific SPR bit(s) identified by mask. */
inline void
setsprbits(const int regno, const unsigned long mask, const unsigned long value)
{
  sprword regvalue = mfspr(regno);
  sprword shifted = 0x0;
  int m, v = 0;
 
  /* m counts bits in valuemask */
  /* v counts bits in value */
  for (m = 0; m < 32; m++)
    if ((mask >> m) & 0x1) {
      shifted |= ((value >> v) & 0x1) << m;
      v++;
    }
 
  /* printf("oldvalue %x setsprbits(%x, %x, %x)  shifted %x", regvalue, regno, mask, value, shifted); */
  mtspr(regno, (regvalue & ~mask) | shifted);
 
  return;
}
 
/* Get specific SPR bit(s) identified by mask. */
inline unsigned long
getsprbits(const int regno, const unsigned long mask)
{
  sprword regvalue = mfspr(regno);
  sprword shifted = 0x0;
  int m, v = 0;
 
  /* m counts bits in valuemask */
  /* v counts bits in regvalue */
  for (m = 0; m < 32; m++)
    if ((mask >> m) & 0x1) {
      shifted |= ((regvalue >> m) & 0x1) << v;
      v++;
    }
 
  return shifted;
}
 
/* Get specific SPR bit(s) identified by mask. */
inline unsigned long
testsprbits(const int regno, const unsigned long mask)
{
  sprword regvalue = mfspr(regno);
  return regvalue & mask;
}
 
/* Show status of important SPRs. */
void sprs_status()
{
  printf("VR   : 0x%.8x  UPR  : 0x%.8x\n", mfspr(SPR_VR), mfspr(SPR_UPR));
  printf("SR   : 0x%.8x\n", mfspr(SPR_SR));
  printf("MACLO: 0x%.8x  MACHI: 0x%.8x\n", mfspr(SPR_MACLO), mfspr(SPR_MACHI));
  printf("EPCR0: 0x%.8x  EPCR1: 0x%.8x\n", mfspr(SPR_EPCR_BASE), mfspr(SPR_EPCR_BASE+1));
  printf("EEAR0: 0x%.8x  EEAR1: 0x%.8x\n", mfspr(SPR_EEAR_BASE), mfspr(SPR_EEAR_BASE+1));
  printf("ESR0 : 0x%.8x  ESR1 : 0x%.8x\n", mfspr(SPR_ESR_BASE), mfspr(SPR_ESR_BASE+1));
  printf("TTMR : 0x%.8x  TTCR : 0x%.8x\n", mfspr(SPR_TTMR), mfspr(SPR_TTCR));
  printf("PICMR: 0x%.8x  PICPR: 0x%.8x\n", mfspr(SPR_PICMR), mfspr(SPR_PICPR));
  printf("PICSR: 0x%.8x\n", mfspr(SPR_PICSR));
  printf("PPC:   0x%.8x  NPC   : 0x%.8x\n", mfspr(SPR_PPC), mfspr(SPR_NPC));
}