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[/] [pss/] [trunk/] [pss/] [hdl/] [pss/] [zpu_uc/] [motherblock/] [pss_int_controller.v] - Rev 5
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/* PSS Copyright (c) 2016 Alexander Antonov <153287@niuitmo.ru> All rights reserved. Version 0.99 The FreeBSD license Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PSS PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ module pss_int_controller ( input clk_i, rst_i, input [7:0] interrupt_bi, // control interface output ie_o, input ie_we_i, input ie_data_i, input [7:0] mask_bi, output [7:0] pending_bo, input clr_cmd_i, input [7:0] clr_code_bi, // cpu interface output reg cpu_req_o, input cpu_ack_i ); reg [7:0] int_req, int_req_next; reg IE; wire [7:0] interrupt_masked; assign interrupt_masked = interrupt_bi & mask_bi; assign pending_bo = int_req; assign ie_o = IE; always @* begin // default int_req_next = int_req; // deasserting from cpu if (clr_cmd_i == 1'b1) int_req_next = int_req_next & ~clr_code_bi; // asserting from external interrupts int_req_next = int_req_next | interrupt_masked; end always @(posedge clk_i) begin if (rst_i) int_req <= 8'h0; else int_req <= int_req_next; end always @(posedge clk_i) begin if (rst_i) begin IE <= 1'b0; cpu_req_o <= 1'b0; end else begin if (ie_we_i == 1'b1) IE <= ie_data_i; if ((IE == 1'b1) && (int_req != 8'h0)) begin cpu_req_o <= 1'b1; IE <= 1'b0; end else if (cpu_ack_i == 1'b1) cpu_req_o <= 1'b0; end end endmodule