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[/] [rc4-prbs/] [trunk/] [Makefile] - Rev 19

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VERILOG=iverilog


all: rc4.vvp
rc4.vvp: rc4_tb.v rc4.v

clean:
        $(RM) *.vvp *.vcd 

# Create an Icarus processed file from a verilog source
%.vvp: %.v
        $(VERILOG) -o $@ $^

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