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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wmul.cgs] - Rev 26
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# Intel(r) Wireless MMX(tm) technology testcase for WMUL# mach: xscale# as: -mcpu=xscale+iwmmxt.include "testutils.inc"start.global wmulwmul:# Enable access to CoProcessors 0 & 1 before# we attempt these instructions.mvi_h_gr r1, 3mcr p15, 0, r1, cr15, cr1, 0# Test Unsigned, Most Significant Multiplymvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x22222222mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wmulum wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x22222222test_h_gr r4, 0x013605c3test_h_gr r5, 0x14a11db9# Test Unsigned, Least Significant Multiplymvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x22222222mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wmulul wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x22222222test_h_gr r4, 0xa974b5f8test_h_gr r5, 0x84f87be0# Test Signed, Most Significant Multiplymvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x22222222mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wmulsm wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x22222222test_h_gr r4, 0x013605c3test_h_gr r5, 0xf27ffb97# Test Signed, Least Significant Multiplymvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x22222222mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wmulsl wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x22222222test_h_gr r4, 0xa974b5f8test_h_gr r5, 0x84f87be0pass