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https://opencores.org/ocsvn/scarts/scarts/trunk
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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [bcplr.cgs] - Rev 26
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# frv testcase for bcplr $ICCi,$ccond,$hint# mach: all.include "testutils.inc"start.global bcplrbcplr:; ccond is trueset_spr_immed 128,lcrset_spr_addr ok1,lrset_icc 0x0 0bcplr icc0,0,0failok1:set_spr_addr ok2,lrset_icc 0x1 1bcplr icc1,0,1failok2:set_spr_addr ok3,lrset_icc 0x2 2bcplr icc2,0,2failok3:set_spr_addr ok4,lrset_icc 0x3 3bcplr icc3,0,3failok4:set_spr_addr ok5,lrset_icc 0x4 0bcplr icc0,0,0failok5:set_spr_addr ok6,lrset_icc 0x5 1bcplr icc1,0,1failok6:set_spr_addr ok7,lrset_icc 0x6 2bcplr icc2,0,2failok7:set_spr_addr ok8,lrset_icc 0x7 3bcplr icc3,0,3failok8:set_spr_addr bad,lrset_icc 0x8 0bcplr icc0,0,0set_spr_addr bad,lrset_icc 0x9 1bcplr icc1,0,1set_spr_addr bad,lrset_icc 0xa 2bcplr icc2,0,2set_spr_addr bad,lrset_icc 0xb 3bcplr icc3,0,3set_spr_addr bad,lrset_icc 0xc 0bcplr icc0,0,0set_spr_addr bad,lrset_icc 0xd 1bcplr icc1,0,1set_spr_addr bad,lrset_icc 0xe 2bcplr icc2,0,2set_spr_addr bad,lrset_icc 0xf 3bcplr icc3,0,3; ccond is trueset_spr_immed 1,lcrset_spr_addr okh,lrset_icc 0x0 0bcplr icc0,1,0failokh:set_spr_immed 1,lcrset_spr_addr oki,lrset_icc 0x1 1bcplr icc1,1,1failoki:set_spr_immed 1,lcrset_spr_addr okj,lrset_icc 0x2 2bcplr icc2,1,2failokj:set_spr_immed 1,lcrset_spr_addr okk,lrset_icc 0x3 3bcplr icc3,1,3failokk:set_spr_immed 1,lcrset_spr_addr okl,lrset_icc 0x4 0bcplr icc0,1,0failokl:set_spr_immed 1,lcrset_spr_addr okm,lrset_icc 0x5 1bcplr icc1,1,1failokm:set_spr_immed 1,lcrset_spr_addr okn,lrset_icc 0x6 2bcplr icc2,1,2failokn:set_spr_immed 1,lcrset_spr_addr oko,lrset_icc 0x7 3bcplr icc3,1,3failoko:set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x8 0bcplr icc0,1,0set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x9 1bcplr icc1,1,1set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xa 2bcplr icc2,1,2set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xb 3bcplr icc3,1,3set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xc 0bcplr icc0,1,0set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xd 1bcplr icc1,1,1set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xe 2bcplr icc2,1,2set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xf 3bcplr icc3,1,3; ccond is falseset_spr_immed 128,lcrset_spr_addr bad,lrset_icc 0x0 0bcplr icc0,1,0set_icc 0x1 1bcplr icc1,1,1set_icc 0x2 2bcplr icc2,1,2set_icc 0x3 3bcplr icc3,1,3set_icc 0x4 0bcplr icc0,1,0set_icc 0x5 1bcplr icc1,1,1set_icc 0x6 2bcplr icc2,1,2set_icc 0x7 3bcplr icc3,1,3set_icc 0x8 0bcplr icc0,1,0set_icc 0x9 1bcplr icc1,1,1set_icc 0xa 2bcplr icc2,1,2set_icc 0xb 3bcplr icc3,1,3set_icc 0xc 0bcplr icc0,1,0set_icc 0xd 1bcplr icc1,1,1set_icc 0xe 2bcplr icc2,1,2set_icc 0xf 3bcplr icc3,1,3; ccond is falseset_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x0 0bcplr icc0,0,0set_spr_immed 1,lcrset_icc 0x1 1bcplr icc1,0,1set_spr_immed 1,lcrset_icc 0x2 2bcplr icc2,0,2set_spr_immed 1,lcrset_icc 0x3 3bcplr icc3,0,3set_spr_immed 1,lcrset_icc 0x4 0bcplr icc0,0,0set_spr_immed 1,lcrset_icc 0x5 1bcplr icc1,0,1set_spr_immed 1,lcrset_icc 0x6 2bcplr icc2,0,2set_spr_immed 1,lcrset_icc 0x7 3bcplr icc3,0,3set_spr_immed 1,lcrset_icc 0x8 0bcplr icc0,0,0set_spr_immed 1,lcrset_icc 0x9 1bcplr icc1,0,1set_spr_immed 1,lcrset_icc 0xa 2bcplr icc2,0,2set_spr_immed 1,lcrset_icc 0xb 3bcplr icc3,0,3set_spr_immed 1,lcrset_icc 0xc 0bcplr icc0,0,0set_spr_immed 1,lcrset_icc 0xd 1bcplr icc1,0,1set_spr_immed 1,lcrset_icc 0xe 2bcplr icc2,0,2set_spr_immed 1,lcrset_icc 0xf 3bcplr icc3,0,3passbad:fail