URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [testbenches/] [verilog/] [top.vtb] - Rev 135
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reg x_FINISH;
reg x_FAIL;
always@(posedge clk or negedge START)
if(!START) x_FINISH <= 1'b0;
else
if(gpio_0_out == 8'hee) x_FINISH <= 1'b1;
else
if(gpio_0_out == 8'hff) x_FINISH <= 1'b1;
else x_FINISH <= 1'b0;
always@(posedge clk or negedge START)
if(!START) x_FAIL <= 1'b0;
else
if(gpio_1_out != 8'h00) x_FAIL <= (gpio_0_out == 8'hff);
assign STOP = x_FINISH;
assign BAD = x_FAIL;
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