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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [uart/] [sim/] [testbenches/] [xml/] [uart_bfm.design.xml] - Rev 135
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<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2010 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
<ipxact:design
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>logic</ipxact:library>
<ipxact:name>uart</ipxact:name>
<ipxact:version>bfm.design</ipxact:version>
<ipxact:adHocConnections>
<ipxact:adHocConnection>
<ipxact:name>clk</ipxact:name>
<ipxact:internalPortReference componentRef="uart_model" portRef="clk"/>
<ipxact:internalPortReference componentRef="uart_host" portRef="clk"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>reset</ipxact:name>
<ipxact:internalPortReference componentRef="uart_model" portRef="reset"/>
<ipxact:internalPortReference componentRef="uart_host" portRef="reset"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_pad_out</ipxact:name>
<ipxact:internalPortReference componentRef="uart_model" portRef="txd_in"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_pad_in</ipxact:name>
<ipxact:internalPortReference componentRef="uart_model" portRef="rxd_out"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>parity_enable</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="parity_enable"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_parity</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="txd_parity"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_force_parity</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="txd_force_parity"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_data_in</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="txd_data_in"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_buffer_empty</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="txd_buffer_empty"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_load</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="txd_load"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>txd_break</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="txd_break"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_parity</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_parity"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_force_parity</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_force_parity"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_data_out</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_data_out"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_data_avail</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_data_avail"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_data_avail_stb</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_data_avail_stb"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_stop_error</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_stop_error"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>rxd_parity_error</ipxact:name>
<ipxact:internalPortReference componentRef="uart_host" portRef="rxd_parity_error"/>
</ipxact:adHocConnection>
</ipxact:adHocConnections>
<ipxact:componentInstances>
<ipxact:componentInstance>
<ipxact:instanceName>uart_host</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="Testbench" name="uart_host" version="def" />
</ipxact:componentInstance>
<ipxact:componentInstance>
<ipxact:instanceName>uart_model</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="Testbench" name="uart_model" version="def" />
<ipxact:configurableElementValues>
<ipxact:configurableElementValue referenceId="CLKCNT">UART_MODEL_CLKCNT</ipxact:configurableElementValue>
<ipxact:configurableElementValue referenceId="SIZE">UART_MODEL_SIZE</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>
</ipxact:componentInstances>
</ipxact:design>