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https://opencores.org/ocsvn/systemverilog-uart16550/systemverilog-uart16550/trunk
Subversion Repositories systemverilog-uart16550
[/] [systemverilog-uart16550/] [trunk/] [syn/] [uart_top.qpf] - Rev 7
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2010 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.1 Build 304 01/25/2010 Service Pack 1 SJ Web Edition
# Date created = 20:55:27 March 09, 2010
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "9.1"
DATE = "20:55:27 March 09, 2010"
# Revisions
PROJECT_REVISION = "uart_top"
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