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[/] [turbo8051/] [trunk/] [verif/] [log/] [gmac_test_2.log] - Rev 74

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Reading /mtitcl/vsim/pref.tcl 

# 10.2b

# vsim +gmac_test_2 -do run.do -c tb_top 
# ** Note: (vsim-3812) Design is being optimized...
# ** Warning: ../../rtl/uart/uart_core.v(211): (vopt-2685) [TFMPC] - Too few port connections for 'u_rxfifo'.  Expected 14, found 12.
# ** Warning: ../../rtl/uart/uart_core.v(211): (vopt-2718) [TFMPC] - Missing connection for port 'aempty'.
# ** Warning: ../../rtl/uart/uart_core.v(211): (vopt-2718) [TFMPC] - Missing connection for port 'afull'.
# ** Warning: ../../rtl/uart/uart_core.v(227): (vopt-2685) [TFMPC] - Too few port connections for 'u_txfifo'.  Expected 14, found 12.
# ** Warning: ../../rtl/uart/uart_core.v(227): (vopt-2718) [TFMPC] - Missing connection for port 'aempty'.
# ** Warning: ../../rtl/uart/uart_core.v(227): (vopt-2718) [TFMPC] - Missing connection for port 'afull'.
# //  Questa Sim-64
# //  Version 10.2b linux_x86_64 May 16 2013
# //
# //  Copyright 1991-2013 Mentor Graphics Corporation
# //  All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# //  WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
# //  LICENSORS AND IS SUBJECT TO LICENSE TERMS.
# //
# Loading sv_std.std
# Loading work.tb_top(fast)
# Loading work.oc8051_top(fast)
# Loading work.tb_eth_top(fast)
# Loading work.AT45DB321(fast)
# do run.do 
# i : 02
# i : 00
# i : 08
# i : 12
# i : 00
# i : 64
# i : 80
# i : fe
# i : 75
# i : 81
# NOTE : Load memory with Initial delivery content
# NOTE : Initial Load End
# ** Warning: (vsim-3533) [FOFIW] - Failed to open file "../test_log_files/test1_events.log" for writing.
# No such file or directory. (errno = ENOENT)    : ../testcase/gmac_test2.v(20)
#    Time: 0 ps  Iteration: 0  Instance: /tb_top
# NOTE: COMMUNICATION (RE)STARTED
# Config-Write: Id: 1 Addr = 0000, Cfg. Data = 00114501
# Config-Write: Id: 1 Addr = 0008, Cfg. Data = 00001616
# Clock period configured = 40 ns, data width = 4
# Config-Write: Id: 1 Addr = 0024, Cfg. Data = 70407000
# Status: End of Transmission Loop
# 1260 ns: Starting packet transmission to MAC, size = 64
# SA = 12:34:56:78:9a:bc, DA = 16:22:33:44:55:66, type/length = 0700
# Contents:
# 16 22 33 44 55 66 12 34 56 78 9a bc 07 00 24 81
# 09 63 0d 8d 65 12 01 0d 76 3d ed 8c f9 c6 c5 aa
# e5 77 12 8f f2 ce e8 c5 5c bd 2d 65 63 0a 80 20
# aa 9d 96 13 0d 53 6b d5 02 ae 1d cf 21 4c 4b 3d
# ****
#              7020000 ns: Completed packet transmission to MAC
# 8060 ns: Starting packet transmission to MAC, size = 65
# SA = 12:34:56:78:9a:bc, DA = 16:22:33:44:55:66, type/length = 0700
# Contents:
# 16 22 33 44 55 66 12 34 56 78 9a bc 07 00 23 0a
# ca 3c f2 8a 41 d8 78 89 eb b6 c6 ae bc 2a 0b 71
# 85 4f 3b 3a 7e 15 f1 d9 62 4c 9f 8f f8 b7 9f 5c
# 5b 89 49 d0 d7 51 96 0c c2 c8 77 3d 12 fb 72 d9
# bb
# ****
#             13900000 ns: Completed packet transmission to MAC
# Status: End of Waiting Event Loop
# 14940 ns: Starting packet transmission to MAC, size = 66
# SA = 12:34:56:78:9a:bc, DA = 16:22:33:44:55:66, type/length = 0700
# Contents:
# 16 22 33 44 55 66 12 34 56 78 9a bc 07 00 7e 6d
# 39 1f d3 85 78 5b 49 3f 2a 58 86 8e 9c fa 26 73
# a3 2f b3 5f 44 f7 cb e6 5a 29 ed da 65 b5 df 79
# 44 d0 2a ab 0e dc 9a fd c3 56 4e 67 0a b6 6f 99
# f0 ca
# ****
#             20860000 ns: Completed packet transmission to MAC
# 21900 ns: Starting packet transmission to MAC, size = 67
# SA = 12:34:56:78:9a:bc, DA = 16:22:33:44:55:66, type/length = 0700
# Contents:
# 16 22 33 44 55 66 12 34 56 78 9a bc 07 00 38 79
# b8 94 93 04 59 db 4d d9 6d 76 ca b6 95 46 04 f7
# 69 b4 88 28 2d c7 2e 08 1c fd 29 1c 86 da 3d 66
# 70 73 ba 5e fa d5 1a b9 37 96 c0 26 b6 7d dc e1
# d6 98 d3
# ****
#             27900000 ns: Completed packet transmission to MAC
# 28940 ns: Starting packet transmission to MAC, size = 68
# SA = 12:34:56:78:9a:bc, DA = 16:22:33:44:55:66, type/length = 0700
# Contents:
# 16 22 33 44 55 66 12 34 56 78 9a bc 07 00 86 78
# 7e db cf 79 fa 61 17 a1 86 50 f5 35 29 c1 c5 98
# 4b 73 ec 8a 4e a8 a9 a1 0e e6 9f 2a 2a 8d 9e 38
# 79 c8 ca 13 6b c7 b6 ba c4 b9 92 b4 7f 86 fa f2
# d8 8a 95 46
# ****
################################
# time                33776 Passed
################################
# ** Note: $finish    : ../tb/tb_top.v(448)
#    Time: 33876 ns  Iteration: 0  Instance: /tb_top

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