Subversion Repositories utosnet

<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">

  <header>
    <!-- ISE source project file created by Project Navigator.             -->
    <!--                                                                   -->
    <!-- This file contains project source information including a list of -->
    <!-- project source files, project and process properties.  This file, -->
    <!-- along with the project source files, is sufficient to open and    -->
    <!-- implement in ISE Project Navigator.                               -->
    <!--                                                                   -->
    <!-- Copyright (c) 1995-2009 Xilinx, Inc.  All rights reserved. -->
  </header>

  <version xil_pn:ise_version="11.4" xil_pn:schema_version="2"/>

  <files>
    <file xil_pn:name="top.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="uTosNet_spi_xc3s50an.ucf" xil_pn:type="FILE_UCF">
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="uTosNet_spi.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="ipcore_dir/dataRegister.xco" xil_pn:type="FILE_COREGEN">
      <association xil_pn:name="BehavioralSimulation"/>
      <association xil_pn:name="Implementation"/>
    </file>
    <file xil_pn:name="ipcore_dir/dataRegister.ise" xil_pn:type="FILE_COREGENISE">
      <association xil_pn:name="Implementation"/>
    </file>
  </files>

  <properties>
    <property xil_pn:name="Device" xil_pn:value="xc3s50an" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Device Family" xil_pn:value="Spartan3A and Spartan3AN" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|top|Behavioral" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/top" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Optimization Effort" xil_pn:value="High" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Optimization Strategy (Cover Mode)" xil_pn:value="Balanced" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Package" xil_pn:value="tqg144" xil_pn:valueState="default"/>
    <property xil_pn:name="Perform Timing-Driven Packing and Placement" xil_pn:value="true" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Preferred Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
    <property xil_pn:name="Property Specification in Project File" xil_pn:value="Store non-default values only" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Simulator" xil_pn:value="Modelsim-XE VHDL" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Speed Grade" xil_pn:value="-4" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
    <property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
    <property xil_pn:name="Unused IOB Pins" xil_pn:value="Float" xil_pn:valueState="non-default"/>
    <property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
    <!--                                                                                  -->
    <!-- The following properties are for internal use only. These should not be modified.-->
    <!--                                                                                  -->
    <property xil_pn:name="PROP_DesignName" xil_pn:value="PseudoTosNet_digi" xil_pn:valueState="non-default"/>
    <property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="spartan3a" xil_pn:valueState="default"/>
    <property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
    <property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
  </properties>

  <bindings/>

  <libraries/>

  <partitions/>

</project>