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https://opencores.org/ocsvn/1g_ethernet_dpi/1g_ethernet_dpi/trunk
Subversion Repositories 1g_ethernet_dpi
[/] [1g_ethernet_dpi/] [tags/] [v0.0/] [sw/] [dev/] [test_main/] [src/] [_hdl/] [bsp/] [libsrc/] [axidma_v9_0/] [src/] [xaxidma_g.c] - Rev 3
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/******************************************************************* * * CAUTION: This file is automatically generated by HSI. * Version: * DO NOT EDIT. * * Copyright (C) 2010-2016 Xilinx, Inc. All Rights Reserved.* *Permission is hereby granted, free of charge, to any person obtaining a copy *of this software and associated documentation files (the Software), to deal *in the Software without restriction, including without limitation the rights *to use, copy, modify, merge, publish, distribute, sublicense, and/or sell *copies of the Software, and to permit persons to whom the Software is *furnished to do so, subject to the following conditions: * *The above copyright notice and this permission notice shall be included in *all copies or substantial portions of the Software. * * Use of the Software is limited solely to applications: *(a) running on a Xilinx device, or *(b) that interact with a Xilinx device through a bus or interconnect. * *THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL *XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, *WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT *OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * *Except as contained in this notice, the name of the Xilinx shall not be used *in advertising or otherwise to promote the sale, use or other dealings in *this Software without prior written authorization from Xilinx. * * * Description: Driver configuration * *******************************************************************/ #include "xparameters.h" #include "xaxidma.h" /* * The configuration table for devices */ XAxiDma_Config XAxiDma_ConfigTable[] = { { XPAR_AXI_DMA_0_DEVICE_ID, XPAR_AXI_DMA_0_BASEADDR, XPAR_AXI_DMA_0_SG_INCLUDE_STSCNTRL_STRM, XPAR_AXI_DMA_0_INCLUDE_MM2S, XPAR_AXI_DMA_0_INCLUDE_MM2S_DRE, XPAR_AXI_DMA_0_M_AXI_MM2S_DATA_WIDTH, XPAR_AXI_DMA_0_INCLUDE_S2MM, XPAR_AXI_DMA_0_INCLUDE_S2MM_DRE, XPAR_AXI_DMA_0_M_AXI_S2MM_DATA_WIDTH, XPAR_AXI_DMA_0_INCLUDE_SG, XPAR_AXI_DMA_0_NUM_MM2S_CHANNELS, XPAR_AXI_DMA_0_NUM_S2MM_CHANNELS, XPAR_AXI_DMA_0_MM2S_BURST_SIZE, XPAR_AXI_DMA_0_S2MM_BURST_SIZE, XPAR_AXI_DMA_0_MICRO_DMA, XPAR_AXI_DMA_0_ADDR_WIDTH } };