Subversion Repositories 2d_game_console

// Copyright (C) 2017  Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Intel Program License 
// Subscription Agreement, the Intel Quartus Prime License Agreement,
// the Intel MegaCore Function License Agreement, or other 
// applicable license agreement, including, without limitation, 
// that your use is for the sole purpose of programming logic 
// devices manufactured by Intel and sold by Intel or its 
// authorized distributors.  Please refer to the applicable 
// agreement for further details.

// PROGRAM              "Quartus Prime"
// VERSION              "Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition"
// CREATED              "Sun Jul 15 21:43:10 2018"

module Processor(
        clock,
        reset,
        testbench_vsync,
        testbench_PLL_clock,
        six_button_UP_Z,
        six_button_DOWN_Y,
        six_button_LEFT_X,
        six_button_RIGHT_MODE,
        six_button_B_A,
        six_button_C_START,
        SRAM_DQ,
        add_overflow,
        sub_overflow,
        compare_aeb,
        compare_agb,
        compare_alb,
        arbiter_grant_1,
        arbiter_grant_2,
        arbiter_grant_3,
        arbiter_wren,
        cpu_ram_wren,
        cpu_ram_req,
        cpu_const_bool,
        pic_mem_wren,
        pic_mem_req,
        pic_cpu_req,
        cpu_int_ack,
        pic_int_ack_0,
        cpu_v_sync_flag,
        VGA_CLK,
        VGA_HS,
        VGA_VS,
        VGA_BLANK,
        six_button_mem_wren,
        six_button_mem_req,
        six_button_v_sync_flag,
        six_button_int_req,
        SRAM_UB_N,
        SRAM_LB_N,
        SRAM_CE_N,
        SRAM_OE_N,
        SRAM_WE_N,
        arbiter_grant_0,
        sprite_reader_mem_wren,
        sprite_reader_mem_req,
        sprite_reader_line_flag,
        sprite_reader_cpu_sleep,
        six_button_SELECT,
        button_up,
        button_down,
        button_left,
        button_right,
        button_b,
        button_c,
        button_a,
        button_start,
        button_z,
        button_y,
        button_x,
        VGA_SYNC,
        add_result,
        arbiter_addr,
        arbiter_current_state,
        arbiter_data,
        arbiter_next_state,
        cpu_current_state,
        cpu_imm,
        cpu_int_program_counter,
        cpu_int_rflags,
        cpu_next_state,
        cpu_opcode,
        cpu_pc_stack,
        cpu_pc_stack_val,
        cpu_program_counter,
        cpu_ram_addr,
        cpu_ram_data,
        cpu_reg_a_num,
        cpu_reg_a_val,
        cpu_reg_b_num,
        cpu_reg_b_val,
        cpu_reg_c_num,
        cpu_reg_c_val,
        cpu_registers,
        cpu_rflags,
        cpu_rflags_index,
        cpu_rom_addr,
        cpu_sprite_color,
        cpu_sprite_id,
        cpu_sprite_level,
        cpu_sprite_x,
        cpu_sprite_y,
        cpu_stack_pointer,
        divide_quotient,
        divide_remain,
        mult_result,
        pic_current_state,
        pic_int_mask,
        pic_isr_addr,
        pic_mem_addr,
        pic_next_state,
        ram_q,
        rom_q,
        six_button_buttons,
        six_button_counter,
        six_button_current_state,
        six_button_mem_addr,
        six_button_mem_data,
        six_button_next_state,
        sprite_reader_EstadoAtual,
        sprite_reader_EstadoFuturo,
        sprite_reader_level_counter,
        sprite_reader_level_sprite_id,
        sprite_reader_level_sprite_y,
        sprite_reader_mem_addr,
        SRAM_ADDR,
        sub_result,
        VGA_B,
        VGA_G,
        VGA_h_pos,
        VGA_oAddress,
        VGA_R,
        VGA_v_pos
);


input wire      clock;
input wire      reset;
input wire      testbench_vsync;
input wire      testbench_PLL_clock;
input wire      six_button_UP_Z;
input wire      six_button_DOWN_Y;
input wire      six_button_LEFT_X;
input wire      six_button_RIGHT_MODE;
input wire      six_button_B_A;
input wire      six_button_C_START;
input wire      [15:0] SRAM_DQ;
output wire     add_overflow;
output wire     sub_overflow;
output wire     compare_aeb;
output wire     compare_agb;
output wire     compare_alb;
output wire     arbiter_grant_1;
output wire     arbiter_grant_2;
output wire     arbiter_grant_3;
output wire     arbiter_wren;
output wire     cpu_ram_wren;
output wire     cpu_ram_req;
output wire     cpu_const_bool;
output wire     pic_mem_wren;
output wire     pic_mem_req;
output wire     pic_cpu_req;
output wire     cpu_int_ack;
output wire     pic_int_ack_0;
output wire     cpu_v_sync_flag;
output wire     VGA_CLK;
output wire     VGA_HS;
output wire     VGA_VS;
output wire     VGA_BLANK;
output wire     six_button_mem_wren;
output wire     six_button_mem_req;
output wire     six_button_v_sync_flag;
output wire     six_button_int_req;
output wire     SRAM_UB_N;
output wire     SRAM_LB_N;
output wire     SRAM_CE_N;
output wire     SRAM_OE_N;
output wire     SRAM_WE_N;
output wire     arbiter_grant_0;
output wire     sprite_reader_mem_wren;
output wire     sprite_reader_mem_req;
output wire     sprite_reader_line_flag;
output wire     sprite_reader_cpu_sleep;
output wire     six_button_SELECT;
output wire     button_up;
output wire     button_down;
output wire     button_left;
output wire     button_right;
output wire     button_b;
output wire     button_c;
output wire     button_a;
output wire     button_start;
output wire     button_z;
output wire     button_y;
output wire     button_x;
output wire     VGA_SYNC;
output wire     [15:0] add_result;
output wire     [15:0] arbiter_addr;
output wire     [3:0] arbiter_current_state;
output wire     [15:0] arbiter_data;
output wire     [3:0] arbiter_next_state;
output wire     [5:0] cpu_current_state;
output wire     [15:0] cpu_imm;
output wire     [15:0] cpu_int_program_counter;
output wire     [7:0] cpu_int_rflags;
output wire     [5:0] cpu_next_state;
output wire     [5:0] cpu_opcode;
output wire     [127:0] cpu_pc_stack;
output wire     [15:0] cpu_pc_stack_val;
output wire     [15:0] cpu_program_counter;
output wire     [15:0] cpu_ram_addr;
output wire     [15:0] cpu_ram_data;
output wire     [4:0] cpu_reg_a_num;
output wire     [15:0] cpu_reg_a_val;
output wire     [4:0] cpu_reg_b_num;
output wire     [15:0] cpu_reg_b_val;
output wire     [4:0] cpu_reg_c_num;
output wire     [15:0] cpu_reg_c_val;
output wire     [511:0] cpu_registers;
output wire     [7:0] cpu_rflags;
output wire     [2:0] cpu_rflags_index;
output wire     [15:0] cpu_rom_addr;
output wire     [1023:0] cpu_sprite_color;
output wire     [383:0] cpu_sprite_id;
output wire     [5:0] cpu_sprite_level;
output wire     [639:0] cpu_sprite_x;
output wire     [639:0] cpu_sprite_y;
output wire     [2:0] cpu_stack_pointer;
output wire     [15:0] divide_quotient;
output wire     [15:0] divide_remain;
output wire     [31:0] mult_result;
output wire     [3:0] pic_current_state;
output wire     [15:0] pic_int_mask;
output wire     [15:0] pic_isr_addr;
output wire     [15:0] pic_mem_addr;
output wire     [3:0] pic_next_state;
output wire     [15:0] ram_q;
output wire     [31:0] rom_q;
output wire     [15:0] six_button_buttons;
output wire     [9:0] six_button_counter;
output wire     [3:0] six_button_current_state;
output wire     [15:0] six_button_mem_addr;
output wire     [15:0] six_button_mem_data;
output wire     [3:0] six_button_next_state;
output wire     [4:0] sprite_reader_EstadoAtual;
output wire     [4:0] sprite_reader_EstadoFuturo;
output wire     [6:0] sprite_reader_level_counter;
output wire     [5:0] sprite_reader_level_sprite_id;
output wire     [9:0] sprite_reader_level_sprite_y;
output wire     [15:0] sprite_reader_mem_addr;
output wire     [19:0] SRAM_ADDR;
output wire     [15:0] sub_result;
output wire     [7:0] VGA_B;
output wire     [7:0] VGA_G;
output wire     [9:0] VGA_h_pos;
output wire     [19:0] VGA_oAddress;
output wire     [7:0] VGA_R;
output wire     [9:0] VGA_v_pos;

wire    [15:0] buttons_bus;
wire    [15:0] SYNTHESIZED_WIRE_0;
wire    SYNTHESIZED_WIRE_80;
wire    [7:0] SYNTHESIZED_WIRE_2;
wire    [7:0] SYNTHESIZED_WIRE_3;
wire    [9:0] SYNTHESIZED_WIRE_81;
wire    [7:0] SYNTHESIZED_WIRE_5;
wire    [1023:0] SYNTHESIZED_WIRE_6;
wire    [383:0] SYNTHESIZED_WIRE_82;
wire    [1023:0] SYNTHESIZED_WIRE_8;
wire    [639:0] SYNTHESIZED_WIRE_9;
wire    [639:0] SYNTHESIZED_WIRE_83;
wire    [9:0] SYNTHESIZED_WIRE_84;
wire    SYNTHESIZED_WIRE_13;
wire    SYNTHESIZED_WIRE_14;
wire    SYNTHESIZED_WIRE_15;
wire    SYNTHESIZED_WIRE_16;
wire    SYNTHESIZED_WIRE_17;
wire    SYNTHESIZED_WIRE_18;
wire    SYNTHESIZED_WIRE_19;
wire    SYNTHESIZED_WIRE_20;
wire    [15:0] SYNTHESIZED_WIRE_21;
wire    [15:0] SYNTHESIZED_WIRE_22;
wire    [15:0] SYNTHESIZED_WIRE_23;
wire    [15:0] SYNTHESIZED_WIRE_24;
wire    [15:0] SYNTHESIZED_WIRE_25;
wire    [15:0] SYNTHESIZED_WIRE_26;
wire    [19:0] SYNTHESIZED_WIRE_27;
wire    SYNTHESIZED_WIRE_28;
wire    SYNTHESIZED_WIRE_29;
wire    SYNTHESIZED_WIRE_31;
wire    [15:0] SYNTHESIZED_WIRE_85;
wire    [15:0] SYNTHESIZED_WIRE_86;
wire    [15:0] SYNTHESIZED_WIRE_87;
wire    SYNTHESIZED_WIRE_35;
wire    SYNTHESIZED_WIRE_37;
wire    SYNTHESIZED_WIRE_88;
wire    SYNTHESIZED_WIRE_39;
wire    SYNTHESIZED_WIRE_40;
wire    SYNTHESIZED_WIRE_41;
wire    SYNTHESIZED_WIRE_42;
wire    SYNTHESIZED_WIRE_43;
wire    SYNTHESIZED_WIRE_44;
wire    [15:0] SYNTHESIZED_WIRE_45;
wire    [15:0] SYNTHESIZED_WIRE_46;
wire    [15:0] SYNTHESIZED_WIRE_47;
wire    [31:0] SYNTHESIZED_WIRE_48;
wire    [15:0] SYNTHESIZED_WIRE_49;
wire    [31:0] SYNTHESIZED_WIRE_50;
wire    [15:0] SYNTHESIZED_WIRE_52;
wire    SYNTHESIZED_WIRE_54;
wire    SYNTHESIZED_WIRE_60;
wire    [15:0] SYNTHESIZED_WIRE_61;
wire    [15:0] SYNTHESIZED_WIRE_62;
wire    SYNTHESIZED_WIRE_64;
wire    SYNTHESIZED_WIRE_66;
//wire  SYNTHESIZED_WIRE_73;
wire    [7:0] SYNTHESIZED_WIRE_75;
wire    [7:0] SYNTHESIZED_WIRE_76;
wire    [7:0] SYNTHESIZED_WIRE_77;

assign  add_overflow = SYNTHESIZED_WIRE_40;
assign  sub_overflow = SYNTHESIZED_WIRE_41;
assign  compare_aeb = SYNTHESIZED_WIRE_42;
assign  compare_agb = SYNTHESIZED_WIRE_43;
assign  compare_alb = SYNTHESIZED_WIRE_44;
assign  arbiter_grant_1 = SYNTHESIZED_WIRE_35;
assign  arbiter_grant_2 = SYNTHESIZED_WIRE_29;
assign  arbiter_grant_3 = SYNTHESIZED_WIRE_64;
assign  arbiter_wren = SYNTHESIZED_WIRE_60;
assign  cpu_ram_wren = SYNTHESIZED_WIRE_17;
assign  cpu_ram_req = SYNTHESIZED_WIRE_18;
assign  pic_mem_wren = SYNTHESIZED_WIRE_15;
assign  pic_mem_req = SYNTHESIZED_WIRE_16;
assign  pic_cpu_req = SYNTHESIZED_WIRE_37;
assign  cpu_int_ack = SYNTHESIZED_WIRE_28;
assign  pic_int_ack_0 = SYNTHESIZED_WIRE_66;
assign  VGA_VS = SYNTHESIZED_WIRE_88;
assign  six_button_mem_wren = SYNTHESIZED_WIRE_13;
assign  six_button_mem_req = SYNTHESIZED_WIRE_14;
assign  six_button_int_req = SYNTHESIZED_WIRE_31;
assign  arbiter_grant_0 = SYNTHESIZED_WIRE_54;
assign  sprite_reader_mem_wren = SYNTHESIZED_WIRE_19;
assign  sprite_reader_mem_req = SYNTHESIZED_WIRE_20;
assign  sprite_reader_cpu_sleep = SYNTHESIZED_WIRE_39;
assign  add_result = SYNTHESIZED_WIRE_45;
assign  arbiter_addr = SYNTHESIZED_WIRE_61;
assign  arbiter_data = SYNTHESIZED_WIRE_62;
assign  cpu_ram_addr = SYNTHESIZED_WIRE_22;
assign  cpu_ram_data = SYNTHESIZED_WIRE_25;
assign  cpu_reg_a_val = SYNTHESIZED_WIRE_86;
assign  cpu_reg_b_val = SYNTHESIZED_WIRE_87;
assign  cpu_rom_addr = SYNTHESIZED_WIRE_0;
assign  cpu_sprite_color = SYNTHESIZED_WIRE_6;
assign  cpu_sprite_id = SYNTHESIZED_WIRE_82;
assign  cpu_sprite_x = SYNTHESIZED_WIRE_9;
assign  cpu_sprite_y = SYNTHESIZED_WIRE_83;
assign  divide_quotient = SYNTHESIZED_WIRE_46;
assign  divide_remain = SYNTHESIZED_WIRE_47;
assign  mult_result = SYNTHESIZED_WIRE_50;
assign  pic_isr_addr = SYNTHESIZED_WIRE_49;
assign  pic_mem_addr = SYNTHESIZED_WIRE_23;
assign  ram_q = SYNTHESIZED_WIRE_85;
assign  rom_q = SYNTHESIZED_WIRE_48;
assign  six_button_mem_addr = SYNTHESIZED_WIRE_24;
assign  six_button_mem_data = SYNTHESIZED_WIRE_26;
assign  sprite_reader_mem_addr = SYNTHESIZED_WIRE_21;
assign  sub_result = SYNTHESIZED_WIRE_52;
assign  VGA_h_pos = SYNTHESIZED_WIRE_81;
assign  VGA_oAddress = SYNTHESIZED_WIRE_27;
assign  VGA_v_pos = SYNTHESIZED_WIRE_84;




IP_ROM_Program  b2v_inst(
        .clock(clock),
        .address(SYNTHESIZED_WIRE_0),
        .q(SYNTHESIZED_WIRE_48));


Sprite_Processor        b2v_inst1(
        .clk(clock),
        .rst(SYNTHESIZED_WIRE_80),
        .B_in(SYNTHESIZED_WIRE_2),
        .G_in(SYNTHESIZED_WIRE_3),
        .H_pos_in(SYNTHESIZED_WIRE_81),
        .R_in(SYNTHESIZED_WIRE_5),
        .sprite_color(SYNTHESIZED_WIRE_6),
        .sprite_id(SYNTHESIZED_WIRE_82),
        .sprite_shape(SYNTHESIZED_WIRE_8),
        .sprite_x(SYNTHESIZED_WIRE_9),
        .sprite_y(SYNTHESIZED_WIRE_83),
        .V_pos_in(SYNTHESIZED_WIRE_84),
        .B_out(SYNTHESIZED_WIRE_75),
        .G_out(SYNTHESIZED_WIRE_76),
        .R_out(SYNTHESIZED_WIRE_77));


Memory_Arbiter  b2v_inst10(
        .clock(clock),
        .reset(SYNTHESIZED_WIRE_80),
        
        
        
        
        
        
        
        
        .wren_3(SYNTHESIZED_WIRE_13),
        .req_3(SYNTHESIZED_WIRE_14),
        .wren_2(SYNTHESIZED_WIRE_15),
        .req_2(SYNTHESIZED_WIRE_16),
        .wren_1(SYNTHESIZED_WIRE_17),
        .req_1(SYNTHESIZED_WIRE_18),
        .wren_0(SYNTHESIZED_WIRE_19),
        .req_0(SYNTHESIZED_WIRE_20),
        .addr_0(SYNTHESIZED_WIRE_21),
        .addr_1(SYNTHESIZED_WIRE_22),
        .addr_2(SYNTHESIZED_WIRE_23),
        .addr_3(SYNTHESIZED_WIRE_24),
        
        
        
        
        
        .data_1(SYNTHESIZED_WIRE_25),
        
        .data_3(SYNTHESIZED_WIRE_26),
        
        
        
        
        
        
        
        
        .grant_3(SYNTHESIZED_WIRE_64),
        .grant_2(SYNTHESIZED_WIRE_29),
        .grant_1(SYNTHESIZED_WIRE_35),
        .grant_0(SYNTHESIZED_WIRE_54),
        .wren(SYNTHESIZED_WIRE_60),
        .addr(SYNTHESIZED_WIRE_61),
        .current_state(arbiter_current_state),
        .data(SYNTHESIZED_WIRE_62),
        .next_state(arbiter_next_state));
        defparam        b2v_inst10.Grant_0 = 4'b0001;
        defparam        b2v_inst10.Grant_1 = 4'b0010;
        defparam        b2v_inst10.Grant_2 = 4'b0011;
        defparam        b2v_inst10.Grant_3 = 4'b0100;
        defparam        b2v_inst10.Grant_4 = 4'b0101;
        defparam        b2v_inst10.Grant_5 = 4'b0110;
        defparam        b2v_inst10.Grant_6 = 4'b0111;
        defparam        b2v_inst10.Grant_7 = 4'b1000;
        defparam        b2v_inst10.Idle = 4'b0000;


SRAM_Interface  b2v_inst11(
        .iADDR(SYNTHESIZED_WIRE_27),
        .iDATA(SRAM_DQ),
        .oWE_N(SRAM_WE_N),
        .oOE_N(SRAM_OE_N),
        .oCE_N(SRAM_CE_N),
        .oLB_N(SRAM_LB_N),
        .oUB_N(SRAM_UB_N),
        .oADDR(SRAM_ADDR),
        .oBLUE(SYNTHESIZED_WIRE_2),
        .oGREEN(SYNTHESIZED_WIRE_3),
        .oRED(SYNTHESIZED_WIRE_5));


Interrupt_Controller    b2v_inst12(
        .cpu_ack(SYNTHESIZED_WIRE_28),
        .mem_grant(SYNTHESIZED_WIRE_29),
        .clock(clock),
        .reset(SYNTHESIZED_WIRE_80),
        .int_req_0(SYNTHESIZED_WIRE_31),
        
        
        
        .mem_q(SYNTHESIZED_WIRE_85),
        .mem_wren(SYNTHESIZED_WIRE_15),
        .mem_req(SYNTHESIZED_WIRE_16),
        .cpu_req(SYNTHESIZED_WIRE_37),
        .int_ack_0(SYNTHESIZED_WIRE_66),
        
        
        
        .current_state(pic_current_state),
        .int_mask(pic_int_mask),
        .isr_addr(SYNTHESIZED_WIRE_49),
        .mem_addr(SYNTHESIZED_WIRE_23),
        .next_state(pic_next_state));
        defparam        b2v_inst12.Get_Mask = 4'b0100;
        defparam        b2v_inst12.Idle = 4'b0000;
        defparam        b2v_inst12.Int_Req_0 = 4'b0101;
        defparam        b2v_inst12.Int_Req_1 = 4'b0110;
        defparam        b2v_inst12.Int_Req_2 = 4'b0111;
        defparam        b2v_inst12.Int_Req_3 = 4'b1000;
        defparam        b2v_inst12.Read_Mask = 4'b0001;
        defparam        b2v_inst12.Wait_Mem_1 = 4'b0010;
        defparam        b2v_inst12.Wait_Mem_2 = 4'b0011;
        defparam        b2v_inst12.Wait_Req_0 = 4'b1001;
        defparam        b2v_inst12.Wait_Req_1 = 4'b1010;
        defparam        b2v_inst12.Wait_Req_2 = 4'b1011;
        defparam        b2v_inst12.Wait_Req_3 = 4'b1100;


IP_PLL  b2v_inst17(
        .inclk0(clock);
        //.c0(SYNTHESIZED_WIRE_73));


IP_MULT b2v_inst2(
        .clock(clock),
        .dataa(SYNTHESIZED_WIRE_86),
        .datab(SYNTHESIZED_WIRE_87),
        .result(SYNTHESIZED_WIRE_50));


Processor_Controller    b2v_inst20(
        .ram_grant(SYNTHESIZED_WIRE_35),
        .clock(clock),
        .reset(SYNTHESIZED_WIRE_80),
        .int_req(SYNTHESIZED_WIRE_37),
        .v_sync(SYNTHESIZED_WIRE_88),
        .sleep(SYNTHESIZED_WIRE_39),
        .add_overflow(SYNTHESIZED_WIRE_40),
        .sub_overflow(SYNTHESIZED_WIRE_41),
        .compare_aeb(SYNTHESIZED_WIRE_42),
        .compare_agb(SYNTHESIZED_WIRE_43),
        .compare_alb(SYNTHESIZED_WIRE_44),
        .add_result(SYNTHESIZED_WIRE_45),
        .divide_quotient(SYNTHESIZED_WIRE_46),
        .divide_remain(SYNTHESIZED_WIRE_47),
        .instruction(SYNTHESIZED_WIRE_48),
        .isr_addr(SYNTHESIZED_WIRE_49),
        .mult_result(SYNTHESIZED_WIRE_50),
        .ram_q(SYNTHESIZED_WIRE_85),
        .sub_result(SYNTHESIZED_WIRE_52),
        .int_ack(SYNTHESIZED_WIRE_28),
        .const_bool(cpu_const_bool),
        .ram_wren(SYNTHESIZED_WIRE_17),
        .ram_req(SYNTHESIZED_WIRE_18),
        .v_sync_flag(cpu_v_sync_flag),
        .current_state(cpu_current_state),
        .imm(cpu_imm),
        .int_program_counter(cpu_int_program_counter),
        .int_rflags(cpu_int_rflags),
        .next_state(cpu_next_state),
        .opcode(cpu_opcode),
        .pc_stack(cpu_pc_stack),
        .pc_stack_val(cpu_pc_stack_val),
        .program_counter(cpu_program_counter),
        .ram_addr(SYNTHESIZED_WIRE_22),
        .ram_data(SYNTHESIZED_WIRE_25),
        .reg_a_num(cpu_reg_a_num),
        .reg_a_val(SYNTHESIZED_WIRE_86),
        .reg_b_num(cpu_reg_b_num),
        .reg_b_val(SYNTHESIZED_WIRE_87),
        .reg_c_num(cpu_reg_c_num),
        .reg_c_val(cpu_reg_c_val),
        .registers(cpu_registers),
        .rflags(cpu_rflags),
        .rflags_index(cpu_rflags_index),
        .rom_addr(SYNTHESIZED_WIRE_0),
        .sprite_color(SYNTHESIZED_WIRE_6),
        .sprite_id(SYNTHESIZED_WIRE_82),
        .sprite_level(cpu_sprite_level),
        .sprite_x(SYNTHESIZED_WIRE_9),
        .sprite_y(SYNTHESIZED_WIRE_83),
        .stack_pointer(cpu_stack_pointer));
        defparam        b2v_inst20.ADD = 6'b001000;
        defparam        b2v_inst20.AND = 6'b001100;
        defparam        b2v_inst20.BRFL = 6'b011100;
        defparam        b2v_inst20.BRFLR = 6'b011101;
        defparam        b2v_inst20.CALL = 6'b011111;
        defparam        b2v_inst20.CALLR = 6'b100000;
        defparam        b2v_inst20.CMP = 6'b001110;
        defparam        b2v_inst20.code_start_addr = 16'b0000000000000100;
        defparam        b2v_inst20.Decode_Instruction = 6'b000010;
        defparam        b2v_inst20.DIV = 6'b001011;
        defparam        b2v_inst20.Inc_Program_Counter = 6'b100011;
        defparam        b2v_inst20.Int_Req_Wait = 6'b100100;
        defparam        b2v_inst20.Interrupt = 6'b100101;
        defparam        b2v_inst20.IRET = 6'b100110;
        defparam        b2v_inst20.JMP = 6'b011010;
        defparam        b2v_inst20.JR = 6'b011011;
        defparam        b2v_inst20.LIMM = 6'b010011;
        defparam        b2v_inst20.LW_Begin = 6'b010100;
        defparam        b2v_inst20.LW_End = 6'b010111;
        defparam        b2v_inst20.LW_Wait_1 = 6'b010101;
        defparam        b2v_inst20.LW_Wait_2 = 6'b010110;
        defparam        b2v_inst20.MUL = 6'b001010;
        defparam        b2v_inst20.NOP = 6'b011110;
        defparam        b2v_inst20.NOT = 6'b001111;
        defparam        b2v_inst20.opcode_add = 6'b010001;
        defparam        b2v_inst20.opcode_and = 6'b100001;
        defparam        b2v_inst20.opcode_brfl = 6'b101010;
        defparam        b2v_inst20.opcode_brflr = 6'b011010;
        defparam        b2v_inst20.opcode_call = 6'b101011;
        defparam        b2v_inst20.opcode_callr = 6'b011011;
        defparam        b2v_inst20.opcode_cmp = 6'b100100;
        defparam        b2v_inst20.opcode_div = 6'b010101;
        defparam        b2v_inst20.opcode_iret = 6'b101101;
        defparam        b2v_inst20.opcode_jmp = 6'b101001;
        defparam        b2v_inst20.opcode_jr = 6'b011001;
        defparam        b2v_inst20.opcode_limm = 6'b001100;
        defparam        b2v_inst20.opcode_lw = 6'b001001;
        defparam        b2v_inst20.opcode_mul = 6'b010100;
        defparam        b2v_inst20.opcode_nop = 6'b101110;
        defparam        b2v_inst20.opcode_not = 6'b100101;
        defparam        b2v_inst20.opcode_or = 6'b100010;
        defparam        b2v_inst20.opcode_ret = 6'b101100;
        defparam        b2v_inst20.opcode_sprite_color = 6'b110010;
        defparam        b2v_inst20.opcode_sprite_id = 6'b110001;
        defparam        b2v_inst20.opcode_sprite_pos = 6'b110100;
        defparam        b2v_inst20.opcode_sub = 6'b010010;
        defparam        b2v_inst20.opcode_sw = 6'b001010;
        defparam        b2v_inst20.opcode_wait_vsync = 6'b110111;
        defparam        b2v_inst20.OR = 6'b001101;
        defparam        b2v_inst20.Reset = 6'b000000;
        defparam        b2v_inst20.RET = 6'b100001;
        defparam        b2v_inst20.SPRITE_COLOR = 6'b010001;
        defparam        b2v_inst20.SPRITE_ID = 6'b010000;
        defparam        b2v_inst20.SPRITE_POS = 6'b010010;
        defparam        b2v_inst20.SUB = 6'b001001;
        defparam        b2v_inst20.SW_Begin = 6'b011000;
        defparam        b2v_inst20.SW_End = 6'b011001;
        defparam        b2v_inst20.Wait_DIV_1 = 6'b000100;
        defparam        b2v_inst20.Wait_DIV_2 = 6'b000101;
        defparam        b2v_inst20.Wait_DIV_3 = 6'b000110;
        defparam        b2v_inst20.Wait_DIV_4 = 6'b000111;
        defparam        b2v_inst20.Wait_Operation = 6'b000011;
        defparam        b2v_inst20.Wait_Program_Mem_1 = 6'b000001;
        defparam        b2v_inst20.WAIT_VSYNC = 6'b100010;


Sprite_Shape_Reader     b2v_inst21(
        .clock(clock),
        .reset(SYNTHESIZED_WIRE_80),
        .mem_grant(SYNTHESIZED_WIRE_54),
        .H_pos(SYNTHESIZED_WIRE_81),
        .mem_q(SYNTHESIZED_WIRE_85),
        .sprite_id(SYNTHESIZED_WIRE_82),
        .sprite_y(SYNTHESIZED_WIRE_83),
        .V_pos(SYNTHESIZED_WIRE_84),
        .mem_wren(SYNTHESIZED_WIRE_19),
        .mem_req(SYNTHESIZED_WIRE_20),
        .line_flag(sprite_reader_line_flag),
        .cpu_sleep(SYNTHESIZED_WIRE_39),
        .EstadoAtual(sprite_reader_EstadoAtual),
        .EstadoFuturo(sprite_reader_EstadoFuturo),
        .level_counter(sprite_reader_level_counter),
        .level_sprite_id(sprite_reader_level_sprite_id),
        .level_sprite_y(sprite_reader_level_sprite_y),
        
        
        .mem_addr(SYNTHESIZED_WIRE_21),
        .sprite_shape(SYNTHESIZED_WIRE_8));
        defparam        b2v_inst21.Change_Level = 5'b01000;
        defparam        b2v_inst21.Change_Line = 5'b00010;
        defparam        b2v_inst21.Get_Level_Info = 5'b00011;
        defparam        b2v_inst21.line_A = 1'b0;
        defparam        b2v_inst21.line_B = 1'b1;
        defparam        b2v_inst21.Read_Shape = 5'b00111;
        defparam        b2v_inst21.Reset = 5'b00000;
        defparam        b2v_inst21.Set_Shape_Address = 5'b00100;
        defparam        b2v_inst21.Wait_Line = 5'b00001;
        defparam        b2v_inst21.Wait_Mem_1 = 5'b00101;
        defparam        b2v_inst21.Wait_Mem_2 = 5'b00110;


IP_RAM_Data     b2v_inst22(
        .clock(clock),
        .wren(SYNTHESIZED_WIRE_60),
        .address(SYNTHESIZED_WIRE_61),
        .data(SYNTHESIZED_WIRE_62),
        .q(SYNTHESIZED_WIRE_85));


Genesis_6button_Interface       b2v_inst3(
        .clock(clock),
        .reset(SYNTHESIZED_WIRE_80),
        .mem_grant(SYNTHESIZED_WIRE_64),
        .up_z(six_button_UP_Z),
        .down_y(six_button_DOWN_Y),
        .left_x(six_button_LEFT_X),
        .right_mode(six_button_RIGHT_MODE),
        .b_a(six_button_B_A),
        .c_start(six_button_C_START),
        .v_sync(SYNTHESIZED_WIRE_88),
        .int_ack(SYNTHESIZED_WIRE_66),
        .mem_wren(SYNTHESIZED_WIRE_13),
        .mem_req(SYNTHESIZED_WIRE_14),
        .select(six_button_SELECT),
        .v_sync_flag(six_button_v_sync_flag),
        .int_req(SYNTHESIZED_WIRE_31),
        .buttons(buttons_bus),
        .counter(six_button_counter),
        .current_state(six_button_current_state),
        .mem_addr(SYNTHESIZED_WIRE_24),
        .mem_data(SYNTHESIZED_WIRE_26),
        .next_state(six_button_next_state));
        defparam        b2v_inst3.Int_Req = 4'b1100;
        defparam        b2v_inst3.Reset = 4'b0000;
        defparam        b2v_inst3.Step_0 = 4'b0010;
        defparam        b2v_inst3.Step_1 = 4'b0011;
        defparam        b2v_inst3.Step_2 = 4'b0100;
        defparam        b2v_inst3.Step_3 = 4'b0101;
        defparam        b2v_inst3.Step_4 = 4'b0110;
        defparam        b2v_inst3.Step_5 = 4'b0111;
        defparam        b2v_inst3.Step_6 = 4'b1000;
        defparam        b2v_inst3.Step_7 = 4'b1001;
        defparam        b2v_inst3.Wait_Frame = 4'b0001;
        defparam        b2v_inst3.Wait_Mem = 4'b1011;
        defparam        b2v_inst3.Write_Data = 4'b1010;


Reset_Synchronizer      b2v_inst4(
        .clock(clock),
        .reset_in(reset),
        .reset_out(SYNTHESIZED_WIRE_80));


IP_ADD  b2v_inst5(
        .clock(clock),
        .dataa(SYNTHESIZED_WIRE_86),
        .datab(SYNTHESIZED_WIRE_87),
        .overflow(SYNTHESIZED_WIRE_40),
        .result(SYNTHESIZED_WIRE_45));


IP_SUB  b2v_inst6(
        .clock(clock),
        .dataa(SYNTHESIZED_WIRE_86),
        .datab(SYNTHESIZED_WIRE_87),
        .overflow(SYNTHESIZED_WIRE_41),
        .result(SYNTHESIZED_WIRE_52));


IP_DIVIDE       b2v_inst7(
        .clock(clock),
        .denom(SYNTHESIZED_WIRE_87),
        .numer(SYNTHESIZED_WIRE_86),
        .quotient(SYNTHESIZED_WIRE_46),
        .remain(SYNTHESIZED_WIRE_47));


VGA_Interface   b2v_inst8(
        .clk(testbench_PLL_clock),
        .rst(SYNTHESIZED_WIRE_80),
        .B_in(SYNTHESIZED_WIRE_75),
        .G_in(SYNTHESIZED_WIRE_76),
        .R_in(SYNTHESIZED_WIRE_77),
        .BLANK(VGA_BLANK),
        .VGA_SYNC(VGA_SYNC),
        .VGA_CLK(VGA_CLK),
        .HS(VGA_HS),
        .VS(SYNTHESIZED_WIRE_88),
        .B(VGA_B),
        .G(VGA_G),
        .h_pos(SYNTHESIZED_WIRE_81),
        .oAddress(SYNTHESIZED_WIRE_27),
        .R(VGA_R),
        .v_pos(SYNTHESIZED_WIRE_84));
        defparam        b2v_inst8.H_BACK = 48;
        defparam        b2v_inst8.H_DISPLAY = 640;
        defparam        b2v_inst8.H_FRONT = 16;
        defparam        b2v_inst8.H_SYNC = 96;
        defparam        b2v_inst8.V_BACK = 33;
        defparam        b2v_inst8.V_DISPLAY = 480;
        defparam        b2v_inst8.V_FRONT = 10;
        defparam        b2v_inst8.V_SYNC = 2;


IP_COMPARE      b2v_inst9(
        .clock(clock),
        .dataa(SYNTHESIZED_WIRE_86),
        .datab(SYNTHESIZED_WIRE_87),
        .aeb(SYNTHESIZED_WIRE_42),
        .agb(SYNTHESIZED_WIRE_43),
        .alb(SYNTHESIZED_WIRE_44));

assign  button_up = buttons_bus[0];
assign  button_down = buttons_bus[1];
assign  button_left = buttons_bus[2];
assign  button_right = buttons_bus[3];
assign  button_b = buttons_bus[4];
assign  button_c = buttons_bus[5];
assign  button_a = buttons_bus[6];
assign  button_start = buttons_bus[7];
assign  button_z = buttons_bus[8];
assign  button_y = buttons_bus[9];
assign  button_x = buttons_bus[10];
assign  six_button_buttons = buttons_bus;

endmodule