Subversion Repositories 2d_game_console

m255
K4
z2
13
!s112 1.1
!i10d 8192
!i10e 25
!i10f 100
cModel Technology
dC:/intelFPGA/17.0
vGenesis_6button_Interface
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Z1 VDg1SIo80bB@j0V0VzS_@n1
Z2 dC:/Users/Lucas/Desktop/TCC/Processor_ModelSim
w1530371484
8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Genesis_6button_Interface.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Genesis_6button_Interface.v
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Genesis_6button_Interface.v|
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vInterrupt_Controller
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Interrupt_Controller.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Interrupt_Controller.v
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Interrupt_Controller.v|
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n@interrupt_@controller
Eip_add
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Z9 DPx3 std 6 textio 0 22 zE1`LPoLg^DX3Oz^4Fj1K3
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Z11 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_ADD.vhd
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Z15 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_ADD.vhd|
Z16 !s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_ADD.vhd|
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Eip_compare
Z19 w1520474075
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Z20 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_COMPARE.vhd
Z21 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_COMPARE.vhd
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Z22 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_COMPARE.vhd|
Z23 !s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_COMPARE.vhd|
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Eip_divide
Z24 w1530386675
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Z25 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_DIVIDE.vhd
Z26 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_DIVIDE.vhd
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Z27 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_DIVIDE.vhd|
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Eip_mult
Z29 w1522805773
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Z30 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_MULT.vhd
Z31 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_MULT.vhd
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Z35 !s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_MULT.vhd|
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Eip_pll
Z36 w1525568790
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Z37 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_PLL.vhd
Z38 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_PLL.vhd
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Z39 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_PLL.vhd|
Z40 !s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_PLL.vhd|
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Eip_ram_data
Z41 w1526428777
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R9
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Z43 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_RAM_Data.vhd
Z44 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_RAM_Data.vhd
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Z45 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_RAM_Data.vhd|
Z46 !s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_RAM_Data.vhd|
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Eip_rom_program
Z47 w1525012912
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Z48 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_ROM_Program.vhd
Z49 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_ROM_Program.vhd
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Z52 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_ROM_Program.vhd|
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!i113 1
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Eip_sub
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Z55 8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_SUB.vhd
Z56 FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_SUB.vhd
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Z57 !s90 -reportprogress|300|-work|work|-2002|-explicit|-stats=none|C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_SUB.vhd|
Z58 !s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/IP_SUB.vhd|
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vMemory_Arbiter
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w1525139685
8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Memory_Arbiter.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Memory_Arbiter.v
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!s85 0
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Memory_Arbiter.v|
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n@memory_@arbiter
vMemory_Reader_FSM
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Memory_Reader_FSM.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Memory_Reader_FSM.v
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n@memory_@reader_@f@s@m
vProcessor
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Processor.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Processor.v
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Processor.v|
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n@processor
vProcessor_Controller
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w1526427782
8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Processor_Controller.v
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Processor_Controller.v|
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n@processor_@controller
vReset_Synchronizer
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Reset_Synchronizer.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Reset_Synchronizer.v
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Reset_Synchronizer.v|
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n@reset_@synchronizer
vSega_Genesis_6button_Controller
!s110 1528685826
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w1526268585
8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sega_Genesis_6button_Controller.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sega_Genesis_6button_Controller.v
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!s108 1528685826.000000
!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sega_Genesis_6button_Controller.v|
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n@sega_@genesis_6button_@controller
vSprite_Processor
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sprite_Processor.v
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!s107 C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sprite_Processor.v|
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n@sprite_@processor
vSprite_Shape_Reader
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sprite_Shape_Reader.v
FC:/Users/Lucas/Desktop/TCC/Processor_ModelSim/Sprite_Shape_Reader.v
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vSRAM_Controller
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/SRAM_Controller.v
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vSRAM_Interface
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/SRAM_Interface.v
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n@s@r@a@m_@interface
vTB_Processor
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/TB_Processor.v
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n@t@b_@processor
vVGA_Interface
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8C:/Users/Lucas/Desktop/TCC/Processor_ModelSim/VGA_Interface.v
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